ZHCSJE0 September   2018 UCD90320U

PRODUCTION DATA.  

  1. 特性
  2. 应用
  3. 说明
    1.     简化应用
  4. 修订历史记录
  5. 说明 (续)
  6. Pin Configuration and Functions
    1.     Pin Functions
  7. Specifications
    1. 7.1 Absolute Maximum Ratings
    2. 7.2 ESD Ratings
    3. 7.3 Recommended Operating Conditions
    4. 7.4 Thermal Information
    5. 7.5 Electrical Characteristics
    6. 7.6 Non-Volatile Memory Characteristics
    7. 7.7 I2C/PMBus Interface Timing Requirements
    8. 7.8 Typical Characteristics
  8. Detailed Description
    1. 8.1 Overview
    2. 8.2 Functional Block Diagram
    3. 8.3 Feature Description
      1. 8.3.1 TI Fusion Digital Power Designer software
      2. 8.3.2 PMBUS Interface
      3. 8.3.3 Rail Setup
    4. 8.4 Device Functional Modes
      1. 8.4.1  Rail Monitoring Configuration
      2. 8.4.2  GPI Configuration
      3. 8.4.3  Rail Sequence Configuration
      4. 8.4.4  Fault Responses Configuration
      5. 8.4.5  GPO Configuration
        1. 8.4.5.1 Command Controlled GPO
        2. 8.4.5.2 Logic GPO
      6. 8.4.6  Margining Configuration
      7. 8.4.7  Pin Selected Rail States Configuration
      8. 8.4.8  Watchdog Timer
      9. 8.4.9  System Reset Function
      10. 8.4.10 Cascading Multiple Devices
      11. 8.4.11 Rail Monitoring
      12. 8.4.12 Status Monitoring
      13. 8.4.13 Data and Error Logging to EEPROM Memory
      14. 8.4.14 Black Box First Fault Logging
      15. 8.4.15 PMBus Address Selection
      16. 8.4.16 ADC Reference
      17. 8.4.17 Device Reset
      18. 8.4.18 Brownout
      19. 8.4.19 Internal Fault Management
      20. 8.4.20 Single Event Upset
    5. 8.5 Device Configuration and Programming
  9. Application and Implementation
    1. 9.1 Application Information
    2. 9.2 Typical Application
      1. 9.2.1 Design Requirements
      2. 9.2.2 Detailed Design Procedure
      3. 9.2.3 Application Curves
  10. 10Power Supply Recommendations
  11. 11Layout
    1. 11.1 Layout Guidelines
    2. 11.2 Layout Example
  12. 12器件和文档支持
    1. 12.1 社区资源
    2. 12.2 接收文档更新通知
    3. 12.3 商标
    4. 12.4 静电放电警告
    5. 12.5 术语表
  13. 13机械、封装和可订购信息

封装选项

机械数据 (封装 | 引脚)
散热焊盘机械数据 (封装 | 引脚)
订购信息

Single Event Upset

A single event upset (SEU) is a change-of-state caused by the free charge created by the ionization. The UCD90320U device uses ULA particle emission mold compound to reduce the soft errors - FIT(failure in time) number caused by the Alpha Particles. Moreover the following algorithm is adopted to detect SEU in the SRAM containing the static user configuration configured from Fusion Digital Power Designer software. Both ULA mold compound and SEU detection provide higher reliability for the applications.

The device scans configuration memory within approximately six seconds. When the device detects an SEU, the device takes these actions.

  • A device attempts to correct this change-of-state by copying the data stored in the data flash. But if the customer changes the settings on-the-fly and has not saved those changes into the data flash, the correction may not be successful.
  • The device uses MFR_STATUS bit 14 to indicate an SEU event and a PMBUS_ALERT bit triggers when it detects an SEU. The Fusion Digital Power Designer software has an option to prevent this event from triggering a PMBUS_ALERT signal.
  • The SEU bit in the MFR_STATUS does not clear automatically even after the SEU state corrects. The bit clears only when the device is resets, when the device cycles power or when the host issues a clear fault command. The device sets the status bit again if the SEU remains present after the host issues a clear fault command.
  • The device logs an SEU event with the corrupted memory address. The application has the option to disable the detail logging for an SEU event.
  • The device logs one SEU event per device reset or device reboot. The device does not re-log an SEU event after the application issues clear fault command to clear existing fault log.