The TRST pin must have a 10-kΩ pulldown resistor to ground.
The RESET pin should have a 10-kΩ pullup resistor to V33D and a 1-nF decoupling capacitor to ground. The components should be placed as close to the RESET pin as possible.
Depending on application environment, the PMBus signal integrity may be compromised at times. This will cause the UCD9090 to receive incorrect PMBus commands. In a particular case, if (D9h) ROM_MODE command is erroneously received by a UCD9090 device, it will cause the device to enter ROM mode, in which mode the device will not function unless Fusion GUI is connected to the device. To avoid such accidents in a running system, it is suggested to enable Packet Error Checking (PEC) in the PMBus host. UCD9090 can automatically detect and work with PMBus hosts both with and without PEC enabled.
The fault log in UCD9090 is checksum protected. After new log entries are written into the fault log, the checksum will be updated accordingly. After each device reset, UCD9090 will recalculate the fault log checksum and compare it with the existing checksum. If the two checksums are not the same, the device will deem the fault log as corrupted and will erase the fault log as a result.
In the event that the V33D power is dropped before the device finish writing the fault log, the checksum will not be updated correctly, thus the fault log will be erased at the next power-up. The results are
user sees an empty fault log
the device initialization time is approximately 160 ms longer than normal due to the Flash erasing time
Such an event usually happens when the main power of the board drops and no standby power can stay alive for V33D. If such a scenario can be anticipated in an application, it is strongly suggested to use the brown-out function and circuit as described in the previous section.
Do not use the RESET pin to power cycle the rails. Instead, use the PMBus_CNTRL pin as described in Power-Supply Sequencing, or use Pin-Selected Rail States function described in Pin-Selected Rail States.
When a pair of FPWM pin are configured as both Rail Enable and PWM (either margining or general purpose PWM) functions, there would be glitches on the pin configured as rail enable when device is out of reset and under initialization, which may impact the connected power rail. It is not recommended to have such configuration.
PMBus commands (system file, PMBus write script file) method is not recommended for the production programming because GPIO pins may have unexpected behaviors which can disable rails that provide power to device. Data flash hex file or data flash script file shall be used for production programming because GPIO pins are under controlled state.
It is mandatory that the V33D power shall be stable and no device reset shall be fired during the device programming. Data flash may be corrupted if failed to follow these rules.
When a pair of FPWM pins are both used for margining, after device is out of reset, the even FPWM pin may output some pulses which are up to the configured duty cycle and frequency. These pulses may cause unexpected behaviors on the margining rail if that rail is regulated before UCD is out of reset. It is recommended to use the even FPWM pin to margin rails that are directly controlled by the UCD9090 device.