The
TRST pin must have a 10-kΩ pulldown resistor to ground.
The
RESET pin should have a 10-kΩ pullup resistor to V33D and a 1-nF decoupling capacitor to ground. The components should be placed as close to the
RESET pin as possible.
Depending on application environment, the PMBus signal integrity may be compromised at times. This will cause the UCD9090A to receive incorrect PMBus commands. In a particular case, if (D9h) ROM_MODE command is erroneously received by a UCD9090A device, it will cause the device to enter ROM mode, in which mode the device will not function unless Fusion GUI is connected to the device. To avoid such accidents in a running system, it is suggested to enable Packet Error Checking (PEC) in the PMBus host. UCD9090A can automatically detect and work with PMBus hosts both with and without PEC enabled.
The fault log in UCD9090A is checksum protected. After new log entries are written into the fault log, the checksum will be updated accordingly. After each device reset, UCD9090A recalculates the fault log checksum and compare it with the existing checksum. If the two checksums are not the same, the device will deem the fault log as corrupted and will erase the fault log as a result. In the event that the V33D power is dropped before the device finish writing the fault log, the checksum will not be updated correctly, thus the fault log will be erased at the next power-up. The results is no new faults logged. Such an event usually happens when the main power of the board drops and no standby power can stay alive for V33D. If such a scenario can be anticipated in an application, it is strongly suggested to use the brown-out function and circuit as described in the previous section.
Do not use the
RESET pin to power cycle the rails. Instead, use the PMBus_CNTRL pin as described in Section 7.4.1, or use Pin-Selected Rail States function described in Section 7.4.2.
When a pair of FPWM pins are configured as both Rail Enable and PWM (either margining or general purpose PWM) functions, there can be glitches on the pin that is configured as rail enable when the device is out of reset and under initialization. These glitches may impact the connected power rail. It is not recommended to have such a configuration.
PMBus commands (project file, PMBus write script file) method is not recommended for the production programming because GPIO pins may have unexpected behaviors which can disable rails that provide power to device. Data flash hex file or data flash script file shall be used for production programming because GPIO pins are under controlled state.
It is mandatory that the V33D power shall be stable and no device reset shall be fired during the device programming. Data flash may be corrupted if failed to follow these rules.
When a pair of FPWM pins are both used for margining, after device is out of reset, the even FPWM pin may output some pulse which is up to the configured duty cycle and frequency. These pulses may cause unexpected behaviors on the margining rail if that rail is regulated before UCD is out of reset. It is recommended to use the even FPWM pin to margin rails that are directly controlled by the device.