The JTAG port can be used for production programming. Four of the six JTAG pins can also be used as GPIOs during normal operation. See Pin Functions and Table 7-4 for a list of the JTAG signals and which can be used as GPIOs. The JTAG port is compatible with the IEEE Standard 1149.1-1990, IEEE Standard Test-Access Port and Boundary Scan Architecture specification. Boundary scan is not supported on this device. The UCD9090A runs at 10% slower frequency while the JTAG is enabled to ensure best JTAG operation.

The JTAG interface can provide an alternate interface for programming the device. It is disabled by default in order to enable the GPIO pins with which it is multiplexed. There are two conditions under which the JTAG interface is enabled:

1. On power-up if the data flash is blank, allowing JTAG to be used for writing the configuration parameters to a programmed device with no PMBus interaction
2. When address 126 (0x7E) is detected at power up. A short to ground or an open condition on either address pin will cause an address 126 (0x7E) to be generated which enables JTAG mode.

The UCD9090A system clock runs at 90% of nominal speed while in JTAG mode. For this reason it is important that the UCD9090A is not left in JTAG mode for normal application operation.

The Fusion GUI can create SVF files (See Section 7.5) based on a given data flash configuration which can be used to program the desired configuration by JTAG. For Boundary Scan Description Language (BSDL) file that supports the UCD9090A see the product folder in www.ti.com.

There are many JTAG programmers in the market and they all do not function the same. If you plan to use JTAG to configure the device, confirm that you can reliably configure the device with your JTAG tools before committing to a programming solution.