The thermal pad must be connected to the same voltage potential as the device GND pin.

Packages with an exposed thermal pad are specifically designed to provide excellent power dissipation, but board layout greatly influences overall heat dissipation. The thermal resistance from junction-to-ambient (T_JA) is specified for the packages with the exposed thermal pad soldered to a normalized PCB, as described in the PowerPAD™ Thermally-Enhanced Package application report. See also the EIA/JEDEC Specifications JESD51-0 to 7, the QFN and SON PCB Attachment application report, and the Quad Flatpack No-Lead Logic Packages application report. These documents are available for download at www.ti.com.

Component population, layout of traces, layers, and air flow strongly influence heat dissipation. Test worst-case load conditions in the real environment to maintain proper thermal conditions. Minimize thermal stress for proper long-term operation with a junction temperature much less than the absolute maximum rating.