The rise time of the output current is dominated by the gate capacitance of the external FET.

The accuracy of the current mirror relies on the dynamic matching of multiple individual current sources. Settling to full resolution can require a complete cycle lasting around 100μs. Figure 6-2 shows an example of the ripple generated from the individual current source values that average to the specified accuracy over the full cycle.

Figure 6-2 Output Noise Without Filter Into 500Ω

The output glitch magnitude depends on the mismatch of the internal current sources. The output glitch magnitude is approximately proportional to the output current level and scales directly with the load resistor value. The output glitch magnitude differs slightly from device to device. Figure 6-3 and Figure 6-4 show the effects of filtering the output.

Figure 6-3 Output With 10nF Parallel to 500Ω

Figure 6-4 Output With Additional Filter