A separate GPIO line (GPIO 58 by default) reports to the host component that the controller is busy or not busy. Upon power-on-reset, the front-end communication device must wait until the signal goes to LOW state. A signal that remains HIGH continuously idicatesa problem with controller boot-sequence. The source of the problem must be resolve before proceeding.

When a command is sent, the I²C Busy GPIO is pulled HIGH until the command completes execution. If the device attempts to send another command while execution of the first command is ongoing, system confirms whether the I²C Busy GPIO is HIGH or LOW and then takes the decision to send the command. This process ensures that there is no clock stretching, and other devices on the I²C bus are not affected, but it ensures that the command handler is occupied and no other command can be sent at this point. Use the DLP Composer tool to assign a GPIO for this purpose.