SBAA484A November 2020 – December 2022 ADS1115-Q1

4 Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the ADS1115-Q1 (VSSOP and UQFN packages). The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Pin short-circuited to ground (see Table 4-2 and Table 4-6)
Pin open-circuited (see Table 4-3 and Table 4-7)
Pin short-circuited to an adjacent pin (see Table 4-4 and Table 4-8)
Pin short-circuited to VDD (see Table 4-5 and Table 4-9)

Table 4-2 and Table 4-6 through Table 4-4 and Table 4-9 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects

Class	Failure Effects
A	Potential device damage that affects functionality.
B	No device damage, but loss of functionality.
C	No device damage, but performance degradation.
D	No device damage, no impact to functionality or performance.

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

RC filters on every analog input, AINx. Series resistors are sized to limit the input currents into the analog inputs to <10 mA in all circumstances (for example, if the device is unpowered and an input signal is applied).
External pullup resistors on the SDA, SCL, and ALERT/RDY pins to VDD.
External pulldown resistor on the ADDR pin to GND (I²C address = 48h) or a pullup resistor to VDD (I²C address = 49h). Other I²C address configurations are not considered.
The device is the only target on the I²C bus.