SBAA604 December   2023 OPA188 , OPA192 , OPA206 , OPA328

 

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Design Goals

Input Output Supply
VinMin VinMax VoutMin VoutMax VccU1 VeeU1 VccU2 VeeU2 Vref
–10 V +10 V 0.1 V 4.9 V 5 V GND +15 V –15 V 4.096 V

Design Description

This design translates a wide bipolar signal to a small unipolar signal. A common application is to translate a ±12-V bipolar analog input to a 0 V to 5 V unipolar signal. This topology is frequently used in analog input modules to translate a large bipolar input signal to a unipolar signal for driving an analog-to-digital converter (ADC). The document provides equations needed to calculate component values for other range requirements. Important error sources are documented using calculations and simulation.

GUID-20231026-SS0I-RZHV-GXFL-263R3P4SMXBX-low.svg

Design Notes

  1. The OPA328 was selected for the rail-to-rail performance without crossover distortion and wide bandwidth. The OPA328 is an excellent choice for ADC drive because the device has low output impedance, wide bandwidth, and can quickly respond to ADC input transients. This topology works well for many different op amp selections.
  2. The OPA206 was selected as the analog input buffer amplifier for the robust input protection, integrated EMI filter, and overall excellent DC precision. The integrated input protection for this device allows for input signals 40 V beyond each power supply rail. So for a ±15-V supply, the protected input range is ±55 V.
  3. Select 0.1%, 20 ppm/C resistors for good gain and offset accuracy and drift. If a room temperature calibration is used, use the precision resistors to minimize drift.
  4. Place decoupling close to the device power supplies. The OPAx328 and OPAx206 data sheets provide layout suggestions, and this video on Decoupling Capacitors provides further details.

Specifications

Parameter Design Goal Simulated
VoutMin 0.1 V 0.10996 V
VoutMax 4.9 V 4.8992 V
Bandwidth N/A 1.82 MHz
Noise N/A 51.5 μVRMS

Design Steps

  1. Define the input and output conditions. For this example, VinMin = –10 V, VinMax = +10 V, VoutMin = 0.1 V, VoutMax = 4.9 V.
  2. Select a reference voltage. The best practice is to generate this voltage from a precision source such as a series or shunt voltage reference (for example REF5050). Typically, a power supply voltage developed by a low-dropout regulator does not have sufficient accuracy to act as a reference. Vref = 4.096 V in this example.
    Note: The Noninverting Level Shift tool in the Analog Engineer’s Calculator can be used at this point to find all the values automatically. The remaining steps describe the manual method.
    GUID-8A553802-FDE0-4FB6-8544-BAA8B055D35C-low.svg Figure 1-1 Analog Engineer's Calculator Noninverting Level Translation Tool
  3. Choose a resistance for Ra. Generally, a value between 1 kΩ and 100 kΩ is used for Ra. Lower values of Ra reduce noise but increase power consumption. Ra= 10 kΩ in this example.
  4. Calculate Rb based on the equation below. Find the closest standard value (Rb = 16 kΩ is the closest standard value for this example).
    R b = ( V o u t M i n - V o u t M a x ) V r e f R a ( V o u t M a x + V i n M i n - V i n M a x - V o u t M i n ) V r e f + ( V i n M a x V o u t M i n   -   V i n M i n V o u t M a x )
    R b = ( 0.1 V - 4.9 V ) 4.096 V × 10 k Ω [ 4.9 V + ( - 10 V ) - ( 10 V ) - ( 0.1 V ) ] ( 4.096 V ) + [ ( 10 V ) ( 0.1 V ) -   ( - 10 V ) ( 4.9 V ) ] = 16.04 k Ω
  5. Calculate Rc based on the closest standard value for Ra.
    R c = ( V o u t M i n - V o u t M a x ) R a V r e f V i n M i n V o u t M a x - V i n M a x V o u t M i n = ( 0.1 V - 4.9 V ) ( 10 k Ω ) ( 4.096 V ) ( - 10 V ) ( 4.9 V ) - ( 10 V ) ( 0.1 V ) = 3.93 k Ω
  6. Choose an optional filter capacitor. Set the cutoff of this filter to be approximately equal to the cutoff of the input amplifier (OPA209). The filter minimizes the resistor network noise and current noise (in × Req) from the output amplifier (OPA328).
    R e q = 1 1 / R a + 1 / R b + 1 / R c = 1 1 / 10 k Ω + 1 / 16 k Ω + 1 / 3.92 k Ω = 2.4 k Ω
    C f i l t = 1 2 π R e q f c = 1 2 π ( 2.4 k Ω ) ( 2 M H z ) = 33 p F

Design Option

Below is an optional version of the circuit without an input buffer. The main advantage of this implementation is to reduce the cost and complexity. The disadvantage is that the input impedance is much lower than a standard op amp (Rin = Ra + Rb || Rc ). If this option is selected, choosing larger values for the input resistor network is helpful. For the example, input impedance for the circuit shown is Rin = 13.1 kΩ, increasing Ra to 100 kΩ increases the resistance to 131 kΩ. Using larger values for these resistors increases the system noise, and offset due to bias current.

GUID-965B9205-EB88-4D30-8A0E-91A773BB9003-low.svg Figure 1-2 Design Option (no Buffer Amplifier)

DC Transfer Characteristics

The following image shows the DC Transfer function for the standard and buffered version of the circuit. Note that any inaccuracy in the transfer function can be accounted for with a simple calibration (for more details, see the Calibration video).

GUID-07B9B042-F7AD-420D-8899-119B9C550350-low.svg Figure 1-3 DC Transfer Function

AC Transfer Characteristics

The bandwidth of this circuit is limited by the RC filter and the gain bandwidth for the two amplifiers. The filter bandwidth was selected in Design Steps to be 2 MHz, and the amplifier bandwidth is GBWOPA328 = 40 MHz and GBWOPA206 = 3.6 MHz. Thus, the overall bandwidth of the circuit is approximately equal to the RC filter bandwidth (simulated bandwidth fc = 2.83 MHz). Additional details on bandwidth limitations are given in the Bandwidth video series.

GUID-20231026-SS0I-05Z0-SWHZ-VNNGDLVBVRSG-low.svg Figure 1-4 AC Transfer Characteristics

Noise Simulation

Total noise is approximately 51.5 μVRMS. Peak-to-peak is approximately 6 × RMS = 309 µVpp. The noise is a combination of the OPA206 noise, OPA328, and resistor noise. The filter capacitor minimizes the resistor noise and current noise impact from the OPA328. For more information on noise analysis and optimization see the Noise video series.

GUID-957C5E7F-92E6-4418-9238-54E32D545D9F-low.svg Figure 1-5 Noise Simulation

Stability Simulation

This circuit is frequently used to drive an ADC input. Generally, for this application an ADC input filter is used. The values required for this circuit are different depending on the ADC requirements, but RC = (1 nF) (50 Ω) is a common filter. This example shows 61.2 deg of phase margin for the OPA328 driving the typical filter. For more information on stability see the Stability video series.

GUID-1A908C58-DA37-4D80-8336-B38FCDDA7F17-low.svg Figure 1-6 Stability Simulation

Design Featured Devices and Alternative Parts for Input Buffer

Device Key Features Alternative Devices
OPA206 36-V supply, 3.6-MHz bandwidth, input-overvoltage-protected, super beta,
e-trim™ op amp
Precision, 36-V supply op amps
OPA182 36-V supply, 5-MHz bandwidth, zero-drift, low-noise 36-V supply, zero-drift op amps

Design Featured Devices and Alternative Parts for Output Amplifier

Device Key Features Alternative Devices
OPA328 5-V supply, 40-MHz bandwidth, slew rate 30 V / μs, zero-crossover, 50-μV offset voltage, RRIO 5 V, zero-crossover
OPA387 5-V supply, 13-MHz bandwidth, ultra-high precision (2 µV), zero-drift (0.003 µV / C), low-input-bias-current op amp (single), RRIO 5 V, zero-drift
OPA397 5-V supply, 13-MHz bandwidth, slew rate 4.5 V / μs, low-offset (60 µV), low-bias-current, low noise 6.5 nV / √Hz, RRIO e-trim™ op amp 5 V, RRIO e-trim™

Design References

See Analog Engineer's Circuit Cookbooks for TI's comprehensive circuit library.

See the circuit PSpice® simulation file SBOMCG1.

See circuit TINA-TI simulation file SBOMCG0.

For more information on many op-amp topics including common-mode range, output swing, bandwidth, and how to drive an ADC please visit TI Precision Labs.

For additional layout guidelines, see the OPAx328 Precision, 40-MHz, 1.0-pA, Low-Noise, RRIO, CMOS Operational Amplifier With Shutdown and OPAx206 Input-Overvoltage-Protected, 4-μV, 0.08-μV/°C, Low-Power Super Beta, e-trim™ Op Amps data sheets.