The ADS8860 ADC uses an SPI serial communication in mode 1 (CPOL = 0, CPHA = 1) with high-speed clocks higher than 30 MHz; for slower clocks, mode 0 is used (CPOL = 0, CPHA = 0). Because the serial clock (SCLK) frequency can be as fast as 80 MHz, the ADS8860EVM offers 47-Ω resistors between the SPI signals and J2 to aid with signal integrity. Typically, in high-speed SPI communication, fast signal edges can cause overshoot; these 47-Ω resistors slow down the signal edges in order to minimize signal overshoot.