Use the following steps to connect the external ADC clocks and analog input. The clock rates shown below are for the power on/default settings (bypass mode/non-decimation), but the physical connections and signal power levels will remain the same for all ADC modes.

1. For the sample clock (ADC3664EVM), set a signal generator to 125 MHz at a power level of +10 dBm. Connect to the SMA connector J4. A bandpass filter for the sample clock is recommended for best AC performance of the ADC3664EVM.
2. For the DCLKIN clock (ADC3664EVM), set a signal generator to 437.5 MHz at a power level of +10 dBm. A bandpass filter is not required for the DCLKIN clock.
   Attention: External ADC sampling clock source and DCLKIN source must be frequency locked. If this is not performed, the captured data will appear scrambled. If using the onboard clocking option, the sampling clock and DCLKIN are frequency locked.
3. For the analog input, set a signal generator to 10 MHz at a power level of ~ +15 dBm. A bandpass filter is required to reduce harmonic and phase noise effects of the signal generator.