SBOA386B March 2020 – October 2023 INA180-Q1 , INA181-Q1 , INA185-Q1 , INA2180-Q1 , INA2181-Q1 , INA4180-Q1 , INA4181-Q1
4.8 INA181-Q1 and INA185-Q1, DCK Package
Figure 4-8 shows the INA181-Q1 and INA185-Q1 pin diagram for the DCK package. For a detailed description of the device pins, see the Pin Configuration and Functions section in the INA181-Q1 and INA185-Q1 data sheets.
Figure 4-8 Pin Diagram (DCK) PackageTable 4-30 Pin FMA for Device Pins
Short-Circuited to Ground
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| REF | 1 | Normal operation if REF pin is at GND potential by design; otherwise the system measurement will be incorrect. | D if REF = GND by design; B otherwise |
| GND | 2 | Normal operation | D |
| VS | 3 | Power supply shorted to GND. | B |
| IN+ | 4 | In high-side configuration, a short from the bus supply to GND will occur. | B |
| IN- | 5 | In high-side configuration, a short from the bus supply to GND will occur (through RSHUNT). High current will flow from bus supply to GND. The shunt may be damaged. In low-side configuration, normal operation. | B for high-side; D for low-side |
| OUT | 6 | Output will be pulled down to GND and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating could cause die junction temperature to exceed 150°C. | B |
Table 4-31 Pin FMA for Device Pins
Open-Circuited
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| REF | 1 | Output common-mode voltage is not defined. Output will not maintain a linear relationship with differential input voltage. | B |
| GND | 2 | When GND is floating, output will be incorrect as it is no longer referenced to GND. | B |
| VS | 3 | No power to device. Device may be biased through inputs. Output will be incorrect and close to GND. | B |
| IN+ | 4 | Shunt resistor is not connected to amplifier. IN+ pin may float to an unknown value. Output will go to an unknown value not to exceed VS or GND. | B |
| IN- | 5 | Shunt resistor is not connected to amplifier. IN- pin may float to an unknown value. Output will go to an unknown value not to exceed VS or GND. | B |
| OUT | 6 | Output can be left open. There is no effect on the IC, but the output will not be measured. | C |
Table 4-32 Pin FMA for Device Pins
Short-Circuited to Adjacent Pin
| Pin Name | Pin No. | Shorted to | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|---|
| REF | 1 | GND | Normal operation if REF pin is at GND potential by design; otherwise the system measurement will be incorrect. | D if REF=GND by design; B otherwise |
| GND | 2 | VS | Power supply shorted to GND. | B |
| VS | 3 | IN+ | In high-side configuration, device power supply shorted to bus supply (through RSHUNT). In low-side configuration, device power supply shorted to GND. |
A for highside; B for low-side |
| IN+ | 4 | IN- | Inputs shorted together, so no sense voltage applied. Output will stay close to REF potential. | B |
| IN- | 5 | OUT | In high-side configuration, OUT shorted to bus supply with damage possible. In low-side configuration, OUT shorted to GND. | A for high-side; B for low-side |
| OUT | 6 | REF | Output shorted to reference voltage. Output voltage will be incorrect. Depending on state of output voltage, reference voltage source may be short circuit limited. | B |
Table 4-33 Pin FMA for Device Pins
Short-Circuited to
supply
| Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
|---|---|---|---|
| REF | 1 | Normal operation if REF pin is at VS potential by design; otherwise the system measurement will be incorrect. | D if REF=VS by design; B otherwise. |
| GND | 2 | Power supply shorted to GND. | B |
| VS | 3 | Normal operation. | D |
| IN+ | 4 | In high-side configuration, device power supply shorted to bus supply. In low-side configuration, device power supply shorted to GND (through RSHUNT). | A for highside; B for low-side |
| IN- | 5 | In high-side configuration, device power supply shorted to bus supply (through RSHUNT). In low-side configuration, device power supply shorted to GND . | A for highside; B for low-side |
| OUT | 6 | Output will be pulled to VS and output current will be short circuit limited. When left in this configuration for a long time, under high supplies self-heating could cause die junction temperature to exceed 150°C. | B |