SBOA413 September   2020  – MONTH  TLV2314-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)

Pin Failure Mode Analysis (Pin FMA)

This section provides a Failure Mode Analysis (FMA) for the pins of the TLV2314-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

  • Pin short-circuited to Ground (see Table 4-2)
  • Pin open-circuited (see Table 4-3)
  • Pin short-circuited to an adjacent pin (see Table 4-4)
  • Pin short-circuited to supply (see Table 4-5)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality
BNo device damage, but loss of functionality
CNo device damage, but performance degradation
DNo device damage, no impact to functionality or performance

Figure 4-1 shows the TLV2314-Q1 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the TLV2314-Q1 data sheet.

GUID-93DEC32C-EAC7-4C28-BD3A-537AA39E3157-low.gifFigure 4-1 Pin Diagram

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • Single-supply operation is used. For example, V+ = 5V and V- = 0V.

Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class

OUT A

1

May cause device to overheat.

B

-IN A

2

Input at V- (GND) is valid input, however, desired application result is unlikely. Output high if +IN A is greater than zero volts.

C

+IN A

3

Input at V- (GND) is valid input, however, desired application result is unlikely. Output low if -IN A is greater than zero volts.

C

V-

4

Normal operation, unless dual supply voltage was intended.

D

+IN B

5

Input at V- (GND) is valid input, however, desired application result is unlikely. Output low if -IN B is greater than zero volts.

C

-IN B

6

Input at V- (GND) is valid input, however, desired application result is unlikely. Output high if +IN B is greater than zero volts.

C

OUT B

7

May cause device to overheat.

B

V+

8

Diodes from input to V+ may turn on due to input signal and cause electrical overstress (EOS). Main supply shorted. No power to device.

B

Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class

OUT A

1

Output cannot be used by application.

C

-IN A

2

Floating input, circuit will likely not function as expected. Output may be high or low.

C

+IN A

3

Floating input, circuit will likely not function as expected. Output may be high or low.

C

V-

4

Lowest voltage pin will driv V- pin internally via internal diode.

B

+IN B

5

Floating input, circuit will likely not function as expected. Output may be high or low.

C

-IN B

6

Floating input, circuit will likely not function as expected. Output may be high or low.

C

OUT B

7

Output cannot be used by application.

C

V+

8

Highest voltage pin will drive V+ pin internally via internal diode.

B

Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted toDescription of Potential Failure Effect(s)Failure Effect Class

OUT A

1

-IN A

Op amp configured as unity gain buffer.

C

-IN A

2

+IN A

No damage to device. Application circuit will not work.

C

+IN A

3

V-

Input at V- (GND) is valid input, however, desired application result is unlikely. Output low if -IN A is greater than zero volts.

C

V-

4

+IN B

Input at V- (GND) is valid input, however, desired application result is unlikely. Output low if -IN B is greater than zero volts Pins are not adjacent to each other.

C

+IN B

5

-IN B

No damage to device. Application circuit will not work.

C

-IN B

6

OUT B

Op amp configured as unity gain buffer.

C

OUT B

7

V+

May cause device to overheat.

B

V+

8

OUT A

May cause device to overheat. Pins are not adjacent to each other.

B

Table 4-5 Pin FMA for Device Pins Short-Circuited to supply
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class

OUT A

1

May cause device to overheat.

B

-IN A

2

Input at V+ is a valid input, however, desired application result is unlikely. Output goes low if +IN A is less than supply.

C

+IN A

3

Input at V+ is a valid input, however, desired application result is unlikely. Output goes high if -IN A is less than supply.

C

V-

4

Main supply shorted to V- (GND). No power to device.

B

+IN B

5

Input at V+ is a valid input, however, desired application result is unlikely. Output goes high if -IN B is less than supply.

C

-IN B

6

Input at V+ is a valid input, however, desired application result is unlikely. Output goes low if +IN B is less than supply.

C

OUT B

7

May cause device to overheat.

B

V+

8

Normal operation.

D