SBOA453 July 2022 INA333-Q1

4 Pin Failure Mode Analysis (Pin FMA)

This section provides a Failure Mode Analysis (FMA) for the pins of the INA333-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Pin short-circuited to Ground (see Table 4-2)
Pin open-circuited (see Table 4-3)
Pin short-circuited to an adjacent pin (see Table 4-4)
Pin short-circuited to supply (see Table 4-5)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects

Class	Failure Effects
A	Potential device damage that affects functionality
B	No device damage, but loss of functionality
C	No device damage, but performance degradation
D	No device damage, no impact to functionality or performance

Figure 4-1 shows the INA333-Q1 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the INA333-Q1 data sheet.

Figure 4-1 Pin Diagram

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

'Short circuit to Power' means short to V+
'Short circuit to GND or Ground' means short to V–
V+ is equivalent to VCC and V‒ equivalent to VEE

Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground

Pin Name	Pin No.	Description of Potential Failure Effect(s)	Failure Effect Class
RG	1	The device does not receive negative feedback internally causing a loss of functionality.	B
VIN–	2	Inverting pin is shorted to supply, likely resulting in a device output voltage between the negative and positive rails.	B
VIN+	3	Noninverting pin is shorted to supply, likely resulting in a device output voltage between the negative and positive rails.	C
REF	5	Depending on the circuit configuration, the output most likely moves to the negative supply.	B
VOUT	6	Depending on the circuit configuration, the device is likely to be forced into a short-circuit condition with the VOUT voltage ultimately forced to the V– voltage. Prolonged exposure to short-circuit conditions could result in long-term reliability issues.	A
V+	7	INA supplies are shorted together, leaving the V+ pin at some voltage between the V+ and V– sources (depending on the source impedance).	A
RG	8	The device does not receive negative feedback internally causing a loss of functionality.	B

Table 4-3 Pin FMA for Device Pins Open-Circuited

Pin Name	Pin No.	Description of Potential Failure Effect(s)	Failure Effect Class
RG	1	Gain is set to 1 based on gain equation: G = 1 + (100 kΩ / RG).	B
VIN–	2	Inverting pin of the INA is left floating. The VIN– pin voltage likely ends up at the positive or negative rail because of leakage on the ESD diodes, likely resulting in a device output voltage between the negative and positive rails.	B
VIN+	3	Noninverting pin of the INA is left floating. The VIN+ pin voltage likely ends up at the positive or negative rail because of leakage on the ESD diodes, likely resulting in a device output voltage between the negative and positive rails.	B
V–	4	Negative supply is left floating. The INA ceases to function because no current can source or sink to the device.	A
REF	5	Loss of functionality due to floating DC bias of output amplifier potentially causing shift in output voltage.	B
VOUT	6	Loss of device ability for VOUT to drive the application.	A
RG	8	Gain is set to 1 based on gain equation: G = 1 + (100 kΩ / RG)	B

Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin

Pin Name	Pin No.	Shorted to	Description of Potential Failure Effect(s)	Failure Effect Class
RG	1	2	The device does not receive negative feedback internally causing a loss of functionality.	B
VIN–	2	3	Both inputs are tied together. Depending on the offset of the device, the output voltage likely moves to near midsupply.	D
VIN+	3	4	Noninverting pin is tied to the negative rail. Depending on the circuit configuration, the device output voltage will likely land between the negative and positive rails	C
V–	4	5	Depending on the circuit configuration, the output most likely moves to the negative supply.	B
REF	5	6	Depending on the circuit configuration, the device is likely to be forced into a short-circuit condition with the VOUT voltage ultimately forced to the REF voltage. Prolonged exposure to short-circuit conditions could result in long-term reliability issues.	A
VOUT	6	7	Depending on the circuit configuration, the device is likely to be forced into a short-circuit condition with the VOUT voltage ultimately forced to the V+ voltage. Prolonged exposure to short-circuit conditions could result in long-term reliability issues.	A
V+	7	8	The device does not receive negative feedback internally causing a loss of functionality.	B
RG	8	1	Gain is not set and device loses functionality. Prolonged exposure to these conditions will not cause device damage.	B

Table 4-5 Pin FMA for Device Pins Short-Circuited to supply

Pin Name	Pin No.	Description of Potential Failure Effect(s)	Failure Effect Class
RG	1	The device does not receive negative feedback internally causing a loss of functionality.	B
VIN–	2	Inverting pin is shorted to supply, likely resulting in a device output voltage between the negative and positive rails.	B
VIN+	3	Noninverting pin is shorted to supply, likely resulting in a device output voltage between the negative and positive rails.	B
V–	4	INA supplies are shorted together, leaving the V– pin at some voltage between the V– and V+ sources (depending on the source impedance).	A
REf	5	Depending on the circuit configuration, the output most likely moves to the positive supply.	B
VOUT	6	Depending on the circuit configuration, the device is likely to be forced into a short-circuit condition with the VOUT voltage ultimately forced to the V+ voltage. Prolonged exposure to short-circuit conditions could result in long-term reliability issues.	A
RG	8	The device does not receive negative feedback internally causing a loss of functionality.	B