SBOU162A March 2017 – May 2017
Figure 30 shows the schematic for the inverting comparator circuit configuration.
It is important to note that this circuit layout is meant for SOIC package op amps or push-pull output type comparators. This configuration uses a voltage divider R1 and R2 to set up the threshold voltage when no hysteresis is added. The comparator will compare the input signal (Vin) to the threshold voltage (Vth).
where
The comparator input signal is applied to the inverting input, so the output will have an inverted polarity. When Vin > Vth, the output will drive to the negative supply (GND or logic low). When Vin < Vth, the output will drive to the positive supply (V+ or logic high).
R3 can be populated to implement hysteresis which uses two different threshold voltages to avoid the multiple transitions. The input signal must exceed the upper threshold (VH) to transition low or below the lower threshold (VL) to transition high. Equation 19 and Equation 20 will calculate the value of R2 and R3 for the two desired thresholds.
The PCB layout of the top layer of the inverting comparator circuit configuration is displayed in Figure 31.
The PCB layout of the bottom layer of the inverting comparator circuit configuration is displayed in Figure 32.