SBOU252 August 2021 OPA4991 , OPA4991-Q1 , TLV9004 , TLV9004-Q1
Figure 4-7 shows the schematic for the inverting amplifier circuit configuration. To configure the EVM in an inverting configuration short RINP using a 0-Ω resistor or solder bridge, leave RVREF and CVREF unpopulated, and apply the desired common mode voltage(VCM) to the input connection, IN+. The input signal is applied using the input connection IN–.
CH | RINM | RF |
CF |
RINP |
RIso |
CL |
---|---|---|---|---|---|---|
1 | R1 | R2 |
C3 |
R3 |
R5 |
C5 |
2 | R7 | R8 |
C6 |
R9 |
R11 |
C8 |
3 | R13 | R14 |
C9 |
R15 |
R17 |
C11 |
4 | R19 | R20 |
C12 |
R21 |
R23 |
C14 |
Equation 6 displays the DC transfer function for channel 1 of the inverting amplifier circuit configuration. Note, Input signals IN+ and IN- are altered to INP and INM respectively in the transfer function for simplicity of the equation.
Capacitor CF provides the option to filter the output. The cutoff frequency, fc, of the filter can be calculated using Equation 7.
Resistor Riso, and capacitor CL provide the option to create a RC filter, or test output loads for the amplifier. When not applicable, use a zero ohm resistor for Riso and do not populate CL.
Figure 4-8 shows the DYY-AMP-EVM populated with the required components to configure channel 1 as an inverting amplifier with no load.