SBVA076A December 2019 – September 2021 TPS3850-Q1
This section provides a Failure Mode Analysis (FMA) for the pins of the TPS3850-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:
Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.
| Class | Failure Effects |
|---|---|
| A | Potential device damage that affects functionality |
| B | No device damage, but loss of functionality |
| C | No device damage, but performance degradation |
| D | No device damage, no impact to functionality or performance |
Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:
Figure 4-1 shows the TPS3850-Q1 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the TPS3850-Q1 data sheet.
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| VDD | 1 | No device damage, but loss of functionality | B |
| CWD | 2 | No damage to device, but this is an undefined operating condition. WDO tends to be high | C |
| SET0 | 3 | No damage to device, but this is an undefined operating condition | C |
| CRST | 4 | No damage to device, but this is an undefined operating condition. RESET tends to be low | C |
| GND | 5 | Normal Operation | D |
| SET1 | 6 | No damage to device, but this is an undefined operating condition | C |
| WDI | 7 | No damage to device, but this is an undefined operating condition. Watchdog functionality may not be available | B |
| WDO | 8 | No damage to device, but this is an undefined operating condition. Watchdog functionality may not be available | B |
| RESET | 9 | RESET pin is always asserted low. | D |
| SENSE | 10 | RESET pin is always asserted low. | D |
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| VDD | 1 | Device will not function | B |
| CWD | 2 | Sets watchdog timeout to factory programmed 1.6 seconds | C |
| SET0 | 3 | SET0 logic is undefined and the watchdog configuration is undefined | C |
| CRST | 4 | Configures reset delay to the "NC" value, see the Timing Requirements Table 6.6 | C |
| GND | 5 | Device will not function | B |
| SET1 | 6 | SET1 logic is undefined and the watchdog configuration is undefined | C |
| WDI | 7 | WDO will continuously trigger when the watchdog timeout expires if the watchdog is enabled | C |
| WDO | 8 | Open-drain output requires pull-up resistor to function, WDO will always be logic low | C |
| RESET | 9 | Open-drain output requires pull-up resistor to function, RESET will be logic low | C |
| SENSE | 10 | RESET (Output) will be "low", WDO is high impedance state | C |
| Pin Name | Pin No. | Shorted to | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|---|
| VDD | 1 | CWD | Potential device damage that affects functionality | A |
| CWD | 2 | SET0 | Watchdog timeout and configuration undefined | C |
| SET0 | 3 | CRST | Reset delay and watchdog configuration undefined. Device will not function correctly | C |
| CRST | 4 | GND | RESET (Output) will be low and device will not function | B |
| GND | 5 | SET1 | Normal operation, configures SET1 pin as "low" and configures the watchdog. See datasheet for configuration information. | C |
| SET1 | 6 | WDI | Watchdog configuration is undefined, WDO will continuously trigger when the watchdog timeout expires if the watchdog is enabled | C |
| WDI | 7 | WDO | WDO will continuously trigger when the watchdog timeout expires if the watchdog is enabled | C |
| WDO | 8 | RESET | Normal operation, WDO and RESET logically OR together so that if a watchdog or reset fault occurs, the common output will trigger | C |
| RESET | 9 | SENSE | RESET (Output) will be "low", WDO is high impedance state | C |
| SENSE | 10 | VDD | Normal operation, VDD is monitored via the SENSE pin | C |
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| VDD | 1 | Normal | D |
| CWD | 2 | Potential device damage that affects functionality | A |
| SET0 | 3 | Normal operation, configures SET0 to logic high | C |
| CRST | 4 | Not recommend because of excess current draw, User should use a resistor from CRST to VDD if selecting this reset delay timing option | A |
| GND | 5 | Device will not function | B |
| SET1 | 6 | Normal operation, configures SET0 to logic high | C |
| WDI | 7 | WDO will continuously trigger when the watchdog timeout expires if the watchdog is enabled | C |
| WDO | 8 | Open-drain output requires a pull-up resistor, I_WDO ABS MAX may be violated if a watchdog fault occurs and the internal FET turns on shorting GND to VDD | A |
| RESET | 9 | Open-drain output requires a pull-up resistor, I_RESET ABS MAX may be violated if a watchdog fault occurs and the internal FET turns on shorting GND to VDD | A |
| SENSE | 10 | Normal operation, VDD is monitored via the SENSE pin | C |