SCDS418D July   2020  – September 2021

PRODUCTION DATA  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Comparison Table
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Thermal Information
    4. 7.4  Recommended Operating Conditions
    5. 7.5  Source or Drain Continuous Current
    6. 7.6  ±15 V Dual Supply: Electrical Characteristics 
    7. 7.7  ±15 V Dual Supply: Switching Characteristics 
    8. 7.8  ±20 V Dual Supply: Electrical Characteristics
    9. 7.9  ±20 V Dual Supply: Switching Characteristics
    10. 7.10 44 V Single Supply: Electrical Characteristics 
    11. 7.11 44 V Single Supply: Switching Characteristics 
    12. 7.12 12 V Single Supply: Electrical Characteristics 
    13. 7.13 12 V Single Supply: Switching Characteristics 
    14. 7.14 Typical Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1  On-Resistance
    2. 8.2  Off-Leakage Current
    3. 8.3  On-Leakage Current
    4. 8.4  Transition Time
    5. 8.5  tON(EN) and tOFF(EN)
    6. 8.6  Break-Before-Make
    7. 8.7  tON (VDD) Time
    8. 8.8  Propagation Delay
    9. 8.9  Charge Injection
    10. 8.10 Off Isolation
    11. 8.11 Crosstalk
    12. 8.12 Bandwidth
    13. 8.13 THD + Noise
    14. 8.14 Power Supply Rejection Ratio (PSRR)
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Bidirectional Operation
      2. 9.3.2 Rail-to-Rail Operation
      3. 9.3.3 1.8 V Logic Compatible Inputs
      4. 9.3.4 Integrated Pull-Down Resistor on Logic Pins
      5. 9.3.5 Fail-Safe Logic
      6. 9.3.6 Latch-Up Immune
      7. 9.3.7 Ultra-Low Charge Injection
    4. 9.4 Device Functional Modes
    5. 9.5 Truth Tables
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Design Requirements
      2. 10.2.2 Detailed Design Procedure
      3. 10.2.3 Application Curve
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
    2. 12.2 Layout Example
  13. 13Device and Documentation Support
    1. 13.1 Documentation Support
      1. 13.1.1 Related Documentation
    2. 13.2 Receiving Notification of Documentation Updates
    3. 13.3 Support Resources
    4. 13.4 Trademarks
    5. 13.5 Electrostatic Discharge Caution
    6. 13.6 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

7.5 Source or Drain Continuous Current

at supply voltage of VDD ± 10%, VSS ± 10 % (unless otherwise noted)
CONTINUOUS CURRENT PER CHANNEL (IDC) TA = 25°C TA = 85°C TA = 125°C UNIT
PACKAGE TEST CONDITIONS
PW (TSSOP) +44 V Dual Supply(1) 300 190 110 mA
±15 V Dual Supply 300 190 110 mA
+12 V Single Supply 220 150 90 mA
±5 V Dual Supply 210 140 90 mA
+5 V Single Supply 170 110 70 mA
RUM (WQFN) +44 V Single Supply(1) 400 230 120 mA
±15 V Dual Supply  400 230 120 mA
+12 V Single Supply 310 190 100 mA
±5 V Dual Supply 300 190 100 mA
+5 V Single Supply 230 150 90 mA
(1) Specified for nominal supply voltage only.
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