SCEA093 August 2021 SN74AXC1T45 , SN74AXC1T45-Q1 , SN74AXC2T45 , SN74AXC2T45-Q1 , SN74LXC8T245 , SN74LXC8T245-Q1 , TXU0104 , TXU0104-Q1

Design Considerations

Translators enable communication when devices have mismatched logic voltage levels
Prevent damage to devices that cannot support higher voltage inputs
Improve data rates over discrete translation solutions
Protect controller while peripheral is not connected
[FAQ] What are the power sequencing requirements for the translation device?
[FAQ] What should be done with unused I/O pins of the level translator devices?
Need additional assistance? Ask our engineers a question on the TI E2E™ Logic Support Forum

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