SCEA110 July   2021 SN74AXC1T45 , SN74AXC1T45-Q1 , TXS0102 , TXS0102-Q1

 

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  2.   Design Considerations
  3.   Recommended Parts

Design Considerations

  • Translators enable communication when devices have mismatched logic voltage levels
  • Prevent damage to devices that cannot support higher voltage inputs
  • Use a fixed-direction translator for the clock (MDC) if higher speeds are required; some newer devices use a clock as high as 50 MHz
  • Open-drain compatible translators are required for the data line; although the protocol is not open-drain, pull-up resistors are required on the MDIO signal bus because there are times when the bus is not actively driven
  • See answers to our most frequently asked technical questions on [FAQ] Voltage Translators
  • Need additional assistance? Ask our engineers a question on the TI E2E™ Logic Support Forum