SCLA045 July 2021 SN74AUP2G00 , SN74AUP2G02 , SN74HCS00 , SN74HCS00-Q1 , SN74HCS02 , SN74HCS02-Q1

Design Considerations

Ensure that the error signal is digital; analog signals should be converted using a comparator
Reset latches on system startup; latch circuits do not have a default value
[FAQ] What is the default output of a latched device? (Flip-Flop, latch, register)
[FAQ] How does a slow or floating input affect a CMOS device?
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