SFFS030 October   2024 DP83TC812R-Q1 , DP83TG720S-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)

Overview

This document contains information for the DP83TG720S-Q1 and DP83TG720R-Q1 to aid in a functional safety system design. Information provided are:

  • Functional safety failure in time (FIT) rates of the semiconductor component estimated by the application of industry reliability standards
  • Component failure modes and their distribution (FMD) based on the primary function of the device
  • Pin failure mode analysis (pin FMA)

Figure 1-1 shows the device functional block diagram for reference.

DP83TG720S-Q1 DP83TG720R-Q1 Functional Block
                    Diagram Figure 1-1 Functional Block Diagram

The DP83TG720S-Q1 and DP83TG720R-Q1 were developed using a quality-managed development process, but were not developed in accordance with the IEC 61508 or ISO 26262 standards.