SFFS043 September 2022 UCC28C40 , UCC28C41 , UCC28C42 , UCC28C43 , UCC28C44 , UCC28C45 , UCC38C40 , UCC38C41 , UCC38C42 , UCC38C43 , UCC38C44 , UCC38C45
Figure 4-1 shows the UCCx8C4x pin diagram for the SOIC (8), PDIP (8), and VSSOP (8) packages. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the UCCx8C4xdata sheet.
Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|
COMP | 1 | OUT zero duty cycle, output loss of regulation. Possible IC damage | B |
FB | 2 | COMP pin go high, OUT excessive duty-cycle, output loss of regulation. | B |
CS | 3 | Maximum OUT duty-cycle, loss of regulation, likely damage to power switch | B |
RT/CT | 4 | Oscillator stops, OUT zero duty cycle, output loss of regulation | B |
GND | 5 | N/A | D |
OUT | 6 | OUT remains low, zero duty cycle. Likely IC damage | A |
VDD | 7 | IC not biased, OUT zero duty cycle, output loss of regulation | B |
VREF | 8 | OUT zero duty cycle, output loss of regulation, possible IC damage | A |
Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|
COMP | 1 | Regulation loop becomes unstable, oscillation may result | C |
FB | 2 | COMP stays high, OUT excessive duty-cycle, output loss of regulation | B |
CS | 3 | CS pin stays high, OUT zero duty cycle, output loss of regulation | B |
RT/CT | 4 | Oscillator stops, OUT zero duty cycle, output loss of regulation | B |
GND | 5 | Internal GND pulled up to 0.65 V, IC behavior unpredictable | B |
OUT | 6 | OUT at maximum duty cycle, output loss of regulation | B |
VDD | 7 | IC not biased, OUT at zero duty cycle, output loss of regulation | B |
VREF | 8 | VREF reglator unstable and oscillates, output oscillates | C |
Pin Name | Pin No. | Shorted to | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|---|
COMP | 1 | FB | COMP at VREF level, OUT excessive duty cycle, output loss of regulation | B |
FB | 2 | CS | COMP stays at high, OUT excessive duty cycle, output loss of regulation | B |
CS | 3 | RT/CT | Oscillator stops, OUT zero duty cycle, output loss of regulation | B |
RT/CT | 4 | N/A | D | |
GND | 5 | OUT | OUT stays low, OUT zero duty cycle, output loss of regulation, likely IC damage | A |
OUT | 6 | VDD | OUT stays high, 100% duty cycle, likely IC and power supply damage | A |
VDD | 7 | VREF | VREF excess Abs max rating, IC damage, output loss of regulation | A |
VREF | 8 | N/A | D |
Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|
COMP | 1 | Possible IC damange. OUT excessive duty cycle, output loss of regulation | A |
FB | 2 | Excess Abs. Max rating, IC damage. OUT excessive duty cycle, output loss of regulation | A |
CS | 3 | Excess Abs. Max rating, IC damage, OUT zero duty cycle, output loss of regulation | A |
RT/CT | 4 | Excess Abs. Max rating, IC damage, OUT zero duty cycle, output loss of regulation | A |
GND | 5 | IC is not biased. OUT zero duty cycle, output loss of regulation | B |
OUT | 6 | OUT stays high, 100% duty cycle, likely IC and power supply damage | A |
VDD | 7 | N/A | D |
VREF | 8 | VREF excess Abs max rating, IC damage, output loss of regulation | A |