SFFS055 March 2021 SN65HVD1780 , SN65HVD1781 , SN65HVD1782
4 Pin Failure Mode Analysis (Pin FMA)
This section provides a Failure Mode Analysis (FMA) for the pins of the SN65HVD1780, SN65HVD1781, and SN65HVD1782. The failure modes covered in this document include the typical pin-by-pin failure scenarios:
- Pin short-circuited to Ground (see Table 4-2)
- Pin open-circuited (see Table 4-3)
- Pin short-circuited to an adjacent pin (see Table 4-4)
- Pin short-circuited to supply (see Table 4-5)
Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.
Table 4-1 TI Classification of Failure Effects
| Class | Failure Effects |
|---|---|
| A | Potential device damage that affects functionality |
| B | No device damage, but loss of functionality |
| C | No device damage, but performance degradation |
| D | No device damage, no impact to functionality or performance |
Figure 4-1 shows the SN65HVD1780, SN65HVD1781, and SN65HVD1782 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the SN65HVD1780, SN65HVD1781, and SN65HVD1782 datasheet.
Figure 4-1 Pin DiagramTable 4-2 Pin FMA for Device Pins Short-Circuited to
Ground
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| R | 1 | Host unable to receive data from bus via transceiver. Increased output current and ICC when the output state is high. | B |
| RE | 2 | Receiver output always enabled. | D |
| DE | 3 | Driver output always disabled. | B |
| D | 4 | Host unable to transmit data to bus via transceiver. Output state is low when the driver is enabled. | B |
| GND | 5 | Intended operation. | D |
| A | 6 | Non-inverting signal stuck low; bus unable to reach differential high level. Communication errors likely. | B |
| B | 7 | Inverting signal stuck low; bus unable to reach differential high level. Communication errors likely. | B |
| VCC | 8 | Device unpowered; neither transmit nor receive functionality available. Large current load on the external VCC regulator. | B |
Table 4-3 Pin FMA for Device Pins Open-Circuited
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| R | 1 | Host unable to receive data from the bus via transceiver | B |
| RE | 2 | Receiver output always disabled. | B |
| DE | 3 | Driver output always disabled. | B |
| D | 4 | Host unable to transmit data to the bus via transceiver. Output state is indeterminate when the driver is enabled. | B |
| GND | 5 | Device unpowered; neither transmit nor receive functionality available. | B |
| A | 6 | Communication errors likely; may work with degraded margin if the bus termination is not implemented. | B |
| B | 7 | Communication errors likely; may work with degraded margin if the bus termination is not implemented. | B |
| VCC | 8 | Device unpowered; neither transmit nor receive functionality available. | B |
Table 4-4 Pin FMA for Device Pins Short-Circuited to
Adjacent Pin
| Pin Name | Pin No. | Shorted to | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|---|
| R | 1 | RE | Undetermined state of shared net; receive functionality unlikely to work. | B |
| RE | 2 | DE | Receiver is enabled when driver is disabled, and the driver is enabled when the receiver is disabled. Transceiver state may not be well-defined when this short results in contention between two active control lines from the host. | B |
| DE | 3 | D | Driver output can only be output-high or disabled (high-Z). State may not be well-defined due to contention between host control lines. | B |
| GND | 5 | A | Non-inverting signal stuck low; bus unable to reach differential high level. Communication errors likely. | B |
| A | 6 | B | Bus unable to reach differential-high or differential-low states; communication cannot occur on bus. | B |
| B | 7 | VCC | Inverting signal stuck high; bus unable to reach differential high level. Communication errors likely. | B |
Table 4-5 Pin FMA for Device Pins Short-Circuited to
supply
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| R | 1 | Host unable to receive data from bus via transceiver. Increased input current when the output state is low. | B |
| RE | 2 | Receiver output always disabled. | B |
| DE | 3 | Driver output always enabled. | D |
| D | 4 | Host unable to transmit data to bus via transceiver. Output state is high when driver is enabled. | B |
| GND | 5 | Device unpowered; neither transmit nor receive functionality available. Large current load on the external VCC regulator. | B |
| A | 6 | Non-inverting signal stuck high; bus unable to reach differential high level. Communication errors likely. | B |
| B | 7 | Inverting signal stuck high; bus unable to reach differential high level. Communication errors likely. | B |
| VCC | 8 | Intended operation | D |