SFFS091 March 2021 TMCS1100-Q1
4 Pin Failure Mode Analysis (Pin FMA)
This section provides a Failure Mode Analysis (FMA) for the pins of the TMCS1100-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:
- Pin short-circuited to Ground (see Table 4-2)
- Pin open-circuited (see Table 4-3)
- Pin short-circuited to an adjacent pin (see Table 4-4)
- Pin short-circuited to supply (see Table 4-5)
Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.
Table 4-1 TI Classification of Failure
Effects
| Class | Failure Effects |
|---|---|
| A | Potential device damage that affects functionality |
| B | No device damage, but loss of functionality |
| C | No device damage, but performance degradation |
| D | No device damage, no impact to functionality or performance |
Figure 4-1 shows the TMCS1100-Q1 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the TMCS1100-Q1 data sheet.
Figure 4-1 TMCS1100-Q1 Pin DiagramFollowing are the assumptions of use and the device configuration assumed for the pin FMA in this section:
- TA=-40°C to 125°C
- VS=3V to 5.5V
- VCM=-600V to 600V
- VREF=0V to VS
Table 4-2 Pin FMA for Device Pins
Short-Circuited to Ground
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| IN+ | 1 | For forward current, hall-sensor bypassed, providing no signal to be sensed and amplified. If IN+ is at a large potential above GND, this will result in a lot of current being sunk. Depending upon layout and configuration, this could damage the input current system supply, the load device, or the TMCS1100. | A |
| IN+ | 2 | For forward current, hall-sensor bypassed, providing no signal to be sensed and amplified. If IN+ is at a large potential above GND, this will result in a lot of current being sunk. Depending upon layout and configuration, this could damage the input current system supply, the load device, or the TMCS1100. | A |
| IN- | 3 | For reverse current, hall-sensor bypassed, providing no signal to be sensed and amplified. If IN- is at a large potential above GND, this will result in a lot of current being sunk. Depending upon layout and configuration, this could damage the input current system supply, the load device, or the TMCS1100. | A |
| IN- | 4 | For reverse current, hall-sensor bypassed, providing no signal to be sensed and amplified. If IN- is at a large potential above GND, this will result in a lot of current being sunk. Depending upon layout and configuration, this could damage the input current system supply, the load device, or the TMCS1100. | A |
| GND | 5 | Normal Operation | D |
| VREF | 6 | If intended connection is anything other than GND, functionality will be affected. | D if VREF=GND; C otherwise |
| VOUT | 7 | 'Output will be pulled to GND and output current will be short circuit limited. When left in this configuration while VS connected to a high load capable supply and for certain high load conditions through the IN+ and IN- pins, die temperature could approach or exceed 150°C. | B |
| VS | 8 | Power supply shorted to ground | B |
Table 4-3 Pin FMA for Device Pins
Open-Circuited
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| IN+ | 1 | If left open and pin 2 is connected, pin 2 could suffer thermal stress for currents approaching SOA boundary ratings. For normal operating conditions, sensitivity error may increase. | A |
| IN+ | 2 | If left open and pin 1 is connected, pin 1 could suffer thermal stress for currents approaching SOA boundary ratings. For normal operating conditions, sensitivity error may increase. | A |
| IN- | 3 | If left open and pin 4 is connected, pin 4 could suffer thermal stress for currents approaching SOA boundary ratings. For normal operating conditions, sensitivity error may increase. | A |
| IN- | 4 | If left open and pin 3 is connected, pin 3 could suffer thermal stress for currents approaching SOA boundary ratings. For normal operating conditions, sensitivity error may increase. | A |
| GND | 5 | GND is floating. Output will be incorrect as it is no longer referenced to GND. | B |
| VREF | 6 | REF will float to an unknown value. REF is incorrect and output is incorrect. | C |
| VOUT | 7 | Output will be present at the pin; having no loading will not affect the output. However, the user will see unpredictable results further down on the signal chain. | B |
| VS | 8 | No power to device. VOUT will stay at GND. | B |
Table 4-4 Pin FMA for Device Pins
Short-Circuited to Adjacent Pin
| Pin Name | Pin No. | Shorted to | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|---|
| IN+ | 1 | 2 - IN+ | Normal Operation. | D |
| IN+ | 2 | 3 - IN- | IN+ shorted to IN-. This creates a current divider which increase sensitivity error inversely proportional to the resistance of the short. | C |
| IN- | 3 | 4 - IN- | Normal Operation. | D |
| IN- | 4 | 5 - GND | For reverse current, hall-sensor bypassed, providing no signal to be sensed and amplified. If IN- is at a large potential above GND, this will result in a lot of current being sunk. Depending upon layout and configuration, this could damage the input current system supply, the load device, or the TMCS1100. | A |
| GND | 5 | 6 - VREF | If VREF intended connection is anything other than GND, functionality will be affected. | D if VREF=GND; C otherwise |
| VREF | 6 | 7 - VOUT | Output will be pulled to VREF and output current will be short circuit limited. When left in this configuration while VREF connected to a high load capable supply and for certain high load conditions through the IN+ and IN- pins, die temperature could approach or exceed 150°C. | B |
| VOUT | 7 | 8 - VS | Output will be pulled to VS and output current will be short circuit limited. When left in this configuration while VS connected to a high load capable supply and for certain high load conditions through the IN+ and IN- pins, die temperature could approach or exceed 150°C. | B |
| VS | 8 | 1 - IN+ | If 6V>IN+ > 5.5V, device will be operating in non-linear range. If IN+>6V, the device will be damaged. If IN+ < Vs, a lot of current may be pulled from the stage supplying the TMCS1100 | A |
Table 4-5 Pin FMA for Device Pins
Short-Circuited to
supply
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| IN+ | 1 | If 6V>IN+ > 5.5V, device will be operating in non-linear range. If IN+>6V, the device will be damaged. If IN+ < Vs, a lot of current may be pulled from the stage supplying the TMCS1100. | A |
| IN+ | 2 | If 6V>IN+ > 5.5V, device will be operating in non-linear range. If IN+>6V, the device will be damaged. If IN+ < Vs, a lot of current may be pulled from the stage supplying the TMCS1100. | A |
| IN- | 3 | If 6V>IN- > 5.5V, device will be operating in non-linear range. If IN->6V, the device will be damaged. If IN- < Vs, a lot of current may be pulled from the stage supplying the TMCS1100. | A |
| IN- | 4 | If 6V>IN- > 5.5V, device will be operating in non-linear range. If IN->6V, the device will be damaged. If IN- < Vs, a lot of current may be pulled from the stage supplying the TMCS1100. | A |
| GND | 5 | Output shorts to supply. Stage supplying the TMCS1100 will pull a lot of current | B |
| VREF | 6 | Output will rail to supply and only reverse current will be measurable | D if REF=VS by design; C otherwise |
| VOUT | 7 | Output will be pulled to VS and output current will be short circuit limited. When left in this configuration while VS connected to a high load capable supply and for certain high load conditions through the IN+ and IN- pins, die temperature could approach or exceed 150°C. | B |
| VS | 8 | Normal operation | D |