4 Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the ADS117L11 (WQFN package), ADS127L11 (TSSOP and WQFN packages), ADS127L21 (WQFN package), and ADS127L21B (WQFN package). The failure modes covered in this document include the typical pin-by-pin failure scenarios:

• Pin short-circuited to ground (see Table 4-6 and Table 4-6)
• Pin open-circuited (see Table 4-7 and Table 4-7)
• Pin short-circuited to an adjacent pin (see Table 4-8 and Table 4-8)
• Pin short-circuited to supply (see Table 4-9 and Table 4-9)

Table 4-6 through Table 4-9 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

• AVDD1 = AVDD2 = IOVDD = 5V
• AVSS = Thermal pad voltage = 0V
• IOVDD power-supply voltage is the same supply voltage used for driving the digital inputs
• Short-circuit to supply means short to AVDD1 = AVDD2 = IOVDD
• Short-circuit to ground means short to DGND = AVSS
• The VCM output voltage is actively used in the external circuit to establish the input common-mode voltage
• The device is the only peripheral device on the SPI bus
• Series resistors are used on the analog inputs and are sized to limit the input currents into the analog inputs to <10mA in all circumstances, such as if the device is not powered with an input signal applied