SFFS212 July   2021 TCA9517-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)

Pin Failure Mode Analysis (Pin FMA)

This section provides a Failure Mode Analysis (FMA) for the pins of the TCA9517-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

  • Pin short-circuited to Ground (see Table 4-2)
  • Pin open-circuited (see Table 4-3)
  • Pin short-circuited to an adjacent pin (see Table 4-4)
  • Pin short-circuited to supply (see Table 4-5)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality
BNo device damage, but loss of functionality
CNo device damage, but performance degradation
DNo device damage, no impact to functionality or performance

Figure 4-1 shows the TCA9517-Q1 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the TCA9517-Q1 data sheet.

Figure 4-1 Pin Diagram

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • Assumption x
  • Assumption y
  • etc.
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin Name Pin No. Description of Potential Failure Effect(s) Failure Effect Class
VCCA 1

Device may be held at RESET if VCCA does not power up above 0.8 V

Concern due to this short is VCC to GND from a system level, device is not expected to be damaged from this kind of short.

B
SCLA 2

SCL short to GND cause an I2C stuck bus. From a system level, the I2C bus is not functional. From device level, the device is not expected to be damaged from this short but functionality is lost.

B
SDA 3 SDA short to GND caused an I2C stuck bus. From a system level, the I2C bus is not functional. From device level, the device is not expected to be damaged from this short but functionality is lost. B
GND 4 No expected concerns D
EN 5 The device is disabled and be high impedance. Device funtionality is lost. B
SDAB 6 SDA short to GND causes an I2C stuck bus. From a system level, the I2C bus is not functional. From device level, the device is not expected to be damaged from this short but functionality is lost. B
SCLB 7 SCL short to GND causes an I2C stuck bus. From a system level, the I2C is not functional. From device level, the device is not expected to be damaged from this short but functionality is lost. B
VCCB 8

Device may be held at RESET if VCCA does not poer up above 2.5 V

Concern due to this short is VCC to GND from a system level, device is not expected to be damaged from this kind of short.

B
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin Name Pin No. Description of Potential Failure Effect(s) Failure Effect Class
VCCA 1 Device remains in a RESET or disabled state because VCCA is not above the under voltage lock out (UVLO). Device is high impedance between A and B sides. the device loses functionality, but should not be damaged. B
SCLA 2 The device loses functionality, and may see an increase in supply current. Logic lows on SCL do not pass through this device. B
SDAA 3 The device loses functionality, and may see an increase in supply current. Logic lows on SDA do not pass through this device. B
GND 4 Device functionality is lost. B
EN 5 Device may interrmittently become disabled as the Enable floats. Increased supply current may occur. Device should not be damaged, but functionality is lost. B
SDAB 6 Device loses functionality, and may see an increase in supply current. Logic lows on SDA do not pass through the device. B
SCLB 7 Device loses functionality, and may see an increase in supply current. Logic lows on SCL do not pass through the device. B

VCCB

Device remains in a RESET or disabled state because VCCB is not above the under voltage lock out (UVLO). The device is high impedance between A and B sides. The device functionality is lost, but should not be damaged. B
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin Name Pin No. Shorted to Description of Potential Failure Effect(s) Failure Effect Class
VCCA 1 SCLA Potential damage to any device on this net that tries to pull the pin low. B
SCL 2 SDA I2C signal integrity becomes corrupted. Oscillations may occur on the I2C bus. Device does not function as intended. B
SDAA 3 GND I2C bus is stuck due to SDA being held at GND. I2C bus is not able to recover. The device does not function as intended. B
EN 5 SDAB The device is disabled intermittently as SDAB is driven low. The device may oscillate, and does not function as intended. B
SDAB 6 SCLB I2C signal integrity becomes corrupted. Oscillations may occur on the I2C bus. The device does not function as intended. B
SCLB 7 VCCB Potential damage to any device on this net that tries to pull the pin low. B
Table 4-5 Pin FMA for Device Pins Short-Circuited to supply
Pin Name Pin No. Description of Potential Failure Effect(s) Failure Effect Class
VCCA 1 No affect. D
SCLA 2 Potential harm to the I2C controller or any I2C target device that supports clock stretching. Voltage out low (VoL) likely to shift higher and create signal integrity issues on the I2C system. B
SDAA 3 Potential harm to the I2C controller or any I2C target device on the net. Voltage out low (VoL) likely to shift higher and create signal integrity issues on the I2C system. B
GND 4 Short to GND. No damage expected to device, but may cause GND shift or damage to supply. B
EN 5 No damage expected to device, but device is held in an enabled state. Device may not be able to be disabled so device functionality is lost. B
SDAB 6 Potential harm to the I2C controller or any I2C target device that supports clock stretching. Voltage out low (VoL) likely to shift higher and create signal integrity issues on the I2C system. B
SCLB 7 Potential harm to the I2C controller or any I2C target device that supports clock stretching. Voltage out low (VoL) likely to shift higher and create signal integrity issues on the I2C system. B
VCCB 8 No affect. B