SFFS232A September   2021  – July 2022 TLV3601 , TLV3602

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 DCK, DBV, DGK, DSG Packages
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 DCK and DBV Package
  6. 5Revision History

Overview

This document contains information for TLV3601 (DCK and DBV packages) and TLV3602 (DGK and DSG packages) to aid in a functional safety system design. Information provided are:

  • Functional Safety Failure In Time (FIT) rates of the semiconductor component estimated by the application of industry reliability standards
  • Component failure modes and their distribution (FMD) based on the primary function of the device
  • Pin failure mode analysis (Pin FMA)

Figure 1-1 shows the device functional block diagram of single channel for reference.

Figure 1-1 Functional Block Diagram per Channel

TLV3601 and TLV3602 were developed using a quality-managed development process, but was not developed in accordance with the IEC 61508 or ISO 26262 standards.

ADVANCE INFORMATION for preproduction products; subject to change without notice.