SFFS232A September 2021 – July 2022 TLV3601 , TLV3602
Figure 4-1 shows the TLV3601 pin diagram for the DCK and DBV packages. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the TLV3601 data sheet.
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
OUT | 1 | Thermal stress due to high power dissipation | A |
VEE | 2 | No change if same node as GND | D |
IN+ | 3 | Output goes low, if other input is positive | B |
IN- | 4 | Output goes high, if other input is positive | B |
VCC | 5 | Main suppy shorted out (no power to device) | B |
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
OUT | 1 | Output can't drive application load | B |
VEE | 2 | Lowest voltage pin will drive GND pin internally (via diode) | A |
IN+ | 3 | Output may be low or high | B |
IN- | 4 | Output may be low or high | B |
VCC | 5 | Main suppy open (no power to device) | B |
| Pin Name | Pin No. | Shorted to | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|---|
OUT | 1 | VEE | Thermal stress due to high power dissipation | A |
VEE | 2 | IN+ | Output goes low, if other input is positive | B |
IN+ | 3 | IN- | Output may be low or high | B |
IN- | 4 | VCC | Output goes low, if other input is less positive | B |
VCC | 5 | OUT | Thermal stress due to high power dissipation | A |
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
OUT | 1 | Thermal stress due to high power dissipation | A |
VEE | 2 | Main suppy shorted out (no power to device) | B |
IN+ | 3 | Output goes high, if other input is less positive | B |
IN- | 4 | Output goes low, if other input is less positive | B |
VCC | 5 | No change if same node as VCC | D |