SFFS235 October 2021 TMP102-Q1
The failure mode distribution estimation for TMP102-Q1 in Table 3-1 comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity and from best engineering judgment.
The failure modes listed in this section reflect random failure events and do not include failures due to misuse or overstress.
| Die Failure Modes | Failure Mode Distribution (%) |
|---|---|
| Serial Communication Error | 15% |
| ADC offset out of specification | 20% |
| ADC gain out of specification | 25% |
| ADC conversion output code bit error | 15% |
| ADC incorrect input channel selected | 5% |
| Register bank data bit error | 15% |
| Alert false trip, fails to trip | 5% |