SFFS309A April   2022  – May 2022 TPS3704 , TPS3704-Q1

 

  1.   Trademarks
  2. 1Introduction
  3. 2Hardware Component Failure Modes Effects and Diagnostics Analysis (FMEDA)
    1. 2.1 Random Fault Estimation
      1. 2.1.1 Fault Rate Estimation Theory for Packaging
      2. 2.1.2 Fault Estimation Theory for Silicon Permanent Faults
      3. 2.1.3 Fault Estimation Theory for Silicon Transient Faults
      4. 2.1.4 The Classification of Failure Categories and Calculation
    2. 2.2 Using the FMEDA Spreadsheet Tool
      1. 2.2.1 Mission Profile Tailoring Tab
        1. 2.2.1.1 Confidence Level
        2. 2.2.1.2 Geographical Location
        3. 2.2.1.3 Life Cycle
        4. 2.2.1.4 Use Case Thermal Management Control (Theta-Ja) and Use Case Power
        5. 2.2.1.5 Safe vs Non-Safe (Safe Fail Fraction) for Each Component Type
        6. 2.2.1.6 Analog FIT Distribution Method
        7. 2.2.1.7 Operational Profile
      2. 2.2.2 Pin Level Tailoring Tab
      3. 2.2.3 Function and Diag Tailoring Tab
      4. 2.2.4 Diagnostic Coverage Tab
      5. 2.2.5 Customer Defined Diagnostics Tab
      6. 2.2.6 Totals - ISO26262 Tab
      7. 2.2.7 Details - ISO26262 Tab
      8. 2.2.8 Totals - IEC61508 Tab
      9. 2.2.9 Details - IEC61508 Tab
    3. 2.3 Example Calculation of Metrics
      1. 2.3.1 Assumptions of Use for Calculation of Safety Metrics
      2. 2.3.2 Summary of ISO 26262 Safety Metrics at Device Level
      3. 2.3.3 Summary of IEC 61508 Safety Metrics at Device Level
  4. 3Revision History

2.2.2 Pin Level Tailoring Tab

The user is expected to tailor this sheet to their specific use-case.

The 'Pin Level Tailoring' tab takes the raw (base) package FIT rate and distributes it among each of the pins (or balls) of the device. Each pin gets an equal percentage of the package FIT. The user should use the FMEDA and safety manual to determine which device pins are used in their application for a safety-related function. The device pins that are not used can be marked as "No" for "Safety related HW element to be considered in the analysis?". This will remove these pins from the FIT calculation, which affects the safety related FIT and all derived metrics. Additionally, a Safety Mechanism can be applied to each pin to provide diagnostic coverage for pin failures. The list of diagnostics can be found in the "Pin Level Coverage" section in the bottom right of the 'Diagnostic Coverage' tab. TI may pre-populate the pin level tailoring selections in the pin level tailoring tab based on one or more expected use cases for the device. Altering the selection of Safety Mechanisms will impact the package contribution to Probabilistic Metrics for random Hardware Failures (PMHF) and Single Point Fault Metric (SPFM) in the 'Totals - ISO26262' tab or the Probability of Hardware Failures (PFH) and Safe Failure Fraction (SFF) in the 'Totals - IEC61508' tab.
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