SFFS312 March 2022 LM5152-Q1 , LM51521-Q1
ADVANCE INFORMATION
This section provides a failure mode analysis (FMA) for the pins of the LM5152-Q1 and LM51521-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:
Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.
Class | Failure Effects |
---|---|
A | Potential device damage that affects functionality. |
B | No device damage, but loss of functionality. |
C | No device damage, but performance degradation. |
D | No device damage, no impact to functionality or performance. |
Figure 4-1 shows the LM5152-Q1 and LM51521-Q1 pin diagram. For a detailed description of the device pins, see the Pin Configuration and Functions section in the LM5152-Q1 and LM51521-Q1 data sheet.
Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:
Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|
CSP | 1 | The CSP pin can be damaged if the differential voltage exceeds the 0.3-V absolute maximum rating. | A |
CSN | 2 | The CSN pin can be damaged if the differential voltage exceeds the 0.3-V absolute maximum rating. | A |
VOUT/SENSE | 3 | VOUT is out of regulation. Possible overcharge of the output voltage | A |
STATUS | 4 | Correct output voltage, but loss of STATUS functionality | B |
HO | 5 | High-side driver can be damaged when SW voltage rises. | A |
SW | 6 | No energy is transferred from input to output. | B |
HB | 7 | The HB pin can be damaged when SW voltage rises. | A |
BIAS | 8 | The device is unpowered and, therefore, not functional. | B |
VCC | 9 | Loss of VCC regulation and there is no switching. | B |
PGND | 10 | No effect | D |
LO | 11 | VOUT is out of regulation. LO stops switching. | B |
MODE | 12 | Diode emulation mode is activated. No effect in case the device is configured for diode emulation mode (MODE = GND). | C |
UVLO/EN | 13 | The device is disabled. | B |
SYNC/DITHER/VH/CP | 14 | External clock synchronization is disabled. Spread spectrum is disabled. VCC is not held when EN = GND and the high-side switch cannot turn on 100% during bypass operation. No effect in case external clock synchronization and spread spectrum are disabled and the VCC hold function and high-side switch turn on 100% in bypass mode function is disabled (SYNC/DITHER/VH/CP = GND). | C |
RT | 15 | Maximum switching frequency is much greater than 2.21 MHz. | C |
VREF/RANGE | 16 | No switching. Target output voltage is 0 V. | B |
SS | 17 | Device does not start and there is no switching. | B |
TRK | 18 | VOUT out of regulation and there is no switching. | B |
AGND | 19 | No effect | D |
COMP | 20 | VOUT out of regulation and is not switching. | B |
Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|
CSP | 1 | Loss of current sense signal | B |
CSN | 2 | Loss of current sense signal | B |
VOUT/SENSE | 3 | VOUT out of regulation and there is a possible overcharge of the output voltage. | A |
STATUS | 4 | Correct output voltage, but loss of STATUS functionality | B |
HO | 5 | Loss of the high-side driver. Operating with sync FET body diode conducting | C |
SW | 6 | Loss of the high-side driver. Operating with sync FET body diode conducting | C |
HB | 7 | Loss of boot voltage and hence, the high-side driver. Operating with sync FET body diode conducting | C |
BIAS | 8 | Device is unpowered and, therefore, not functional. | B |
VCC | 9 | No stable VCC to sustain normal operation | B |
PGND | 10 | Possible device damage | A |
LO | 11 | Low-side MOSFET is never switched. | B |
MODE | 12 | No effect if skip mode is active, otherwise skip mode is activated. | C |
UVLO/EN | 13 | Device is disabled. | B |
SYNC/DITHER/VH/CP | 14 | Loss of holdup functionality and charge-pump functionality | C |
RT | 15 | Minimum frequency is set. | C |
VREF/RANGE | 16 | VOUT is out of regulation. | B |
SS | 17 | Small soft-start time. Normal operation after start-up | C |
TRK | 18 | VOUT out of regulation | B |
AGND | 19 | Possible device damage | A |
COMP | 20 | Device can be unstable. | C |
Pin Name | Pin No. | Shorted to | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|---|
CSP | 1 | CSN | Loss of current sense information. Circuit can be unstable. | C |
CSN | 2 | VOUT/SENSE | Possible damage. Exceeds absolute maximum voltage rating | A |
VOUT/SENSE | 3 | PGOOD | Loss of VOUT feedback. Possibly unstable operation | B |
STATUS | 4 | HO | No damage and loss of STATUS function | B |
HO | 5 | SW | Loss of the high-side driver. Operating with sync FET body diode conducting | B |
SW | 6 | HB | Loss of boot voltage and hence, the high-side driver. Operating with sync FET body diode conducting | B |
HB | 7 | BIAS | Possible damage. HB exceeds the absolute maximum voltage rating. | A |
BIAS | 8 | VCC | Possible damage to VCC if BIAS is above the absolute maximum voltage rating of VCC, otherwise no damage. | A |
VCC | 9 | PGND | No VCC rail and there is no switching. | B |
PGND | 10 | LO | LO never turns on. Switching never happens. | B |
LO | 11 | MODE | Switching mode toggles with every switching cycle. | C |
MODE | 12 | UVLO/EN | Switching mode is set by the UVLO/EN pin voltage. | B |
UVLO/EN | 13 | SYNC/DITHER/VH/CP | SYNC/DITHER/VH/CP setting set by the UVLO/EN pin. | B |
SYNC/DITHER/VH/CP | 14 | RT | Possible damage. Can exceed the RT absolute maximum voltage | A |
RT | 15 | VREF/RANGE | Switching frequency will not be correct. | C |
VREF/RANGE | 16 | SS | Small soft-start time | C |
SS | 17 | TRK | TRK > 1.2 V stops any switching on the controller. | B |
TRK | 18 | AGND | VOUT is out of regulation and there is no switching. | B |
AGND | 19 | COMP | VOUT is out of regulation and is not switching. | B |
COMP | 20 | CSP | Possible damage. Exceeds absolute maximum voltage rating of COMP. | A |
Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
---|---|---|---|
CSP | 1 | Normal operation | D |
CSN | 2 | Loss of current sense signal. Circuit can be unstable. | C |
VOUT/SENSE | 3 | VOUT is out of regulation. | B |
STATUS | 4 | Loss of STATUS functionality | B |
HO | 5 | The HO pin can exceed the HO to SW absolute maximum voltage rating. | A |
SW | 6 | No energy is transferred from input to output. | B |
HB | 7 | HB exceeds HB to SW absolute maximum voltage rating. | A |
BIAS | 8 | Normal operation | D |
VCC | 9 | VCC exceeds absolute maximum voltage rating. | A |
PGND | 10 | Possible damage | A |
LO | 11 | Possible damage. Exceeds absolute maximum voltage rating | A |
MODE | 12 | Possible damage. Exceeds absolute maximum voltage rating | A |
UVLO/EN | 13 | No UVLO functionality | C |
SYNC/DITHER/VH/CP | 14 | Possible damage. Exceeds absolute maximum voltage rating | A |
RT | 15 | Possible damage. Exceeds absolute maximum voltage rating | A |
VREF/RANGE | 16 | Possible damage. Exceeds absolute maximum voltage rating | A |
SS | 17 | Possible damage. Exceeds absolute maximum voltage rating | A |
TRK | 18 | Possible damage. Exceeds absolute maximum voltage rating | A |
AGND | 19 | Possible damage. Exceeds absolute maximum voltage rating | A |
COMP | 20 | Possible damage. Exceeds absolute maximum voltage rating | A |