SFFS413 November   2022 LMR51440 , LMR51450

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)

Pin Failure Mode Analysis (Pin FMA)

This section provides a Failure Mode Analysis (FMA) for the pins of the LMR51440 and LMR51450. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

  • Pin short-circuited to Ground (see Table 4-2)
  • Pin open-circuited (see Table 4-3)
  • Pin short-circuited to an adjacent pin (see Table 4-4)
  • Pin short-circuited to supply (see Table 4-5)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality
BNo device damage, but loss of functionality
CNo device damage, but performance degradation
DNo device damage, no impact to functionality or performance

Figure 4-1 shows the LMR51440 and LMR51450 pin diagram. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the LMR51440 and LMR51450 data sheet.

Figure 4-1 Pin Diagram

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
SW1Damage to internal power FET(s) and/or other internal circuitsA
SW2Damage to internal power FET(s) and/or other internal circuitsA
SW3Damage to internal power FET(s) and/or other internal circuitsA
BOOT4VOUT = 0 V, possible damage to internal circuitsA
PG5

No power-good function

B
RT6

Normal operation

D
FB7

The regulator operates at maximum duty cycle. Output voltage rises to nearly the input voltage (VIN) level. Possible damage to customer load and/or output stage components can occur. No effect on device.

B
AGND8Normal operationD
EN9

Loss of ENABLE functionality Device remains in shutdown mode.

B
VIN10

Device does not operate. No output voltage is generated. Output capacitors discharges through input short. Large reverse current can damage device.

A
VIN11

Device does not operate. No output voltage is generated. Output capacitors discharges through input short. Large reverse current can damage device.

A
VIN12

Device does not operate. No output voltage is generated. Output capacitors discharges through input short. Large reverse current can damage device.

A
PGND/DAP13Normal operationD
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
SW1

With both pins open: loss of output voltage. With one pin open: some loss of device performance.

B
SW2

With both pins open: loss of output voltage. With one pin open: some loss of device performance.

B
SW3

With both pins open: loss of output voltage. With one pin open: some loss of device performance.

B
BOOT4

Loss of output voltage regulation; low or no output voltage.

B
PG5

No power good function

B
RT6

Normal operation

D

FB7

Loss of output voltage regulation. Output voltage can rise or fall outside of intended regulation window.

B
AGND8

Loss of output voltage regulation. Possible damage to internal circuits.

A

EN9Loss of ENABLE functionality. Erratic operation; probable loss of regulation.B

VIN

10

With both pins open: loss of output voltage. With one pin open: possible device damage.

A
VIN11With both pins open: loss of output voltage. With one pin open: possible device damage.A
VIN12With both pins open: loss of output voltage. With one pin open: possible device damage.A
PGND/DAP13Loss of output voltage regulation. Possible damage to internal circuits.A
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted toDescription of Potential Failure Effect(s)Failure Effect Class
SW1SWNo effectD
SW2SWNo effectD
SW3BOOT

VOUT = 0 V, possible damage to internal circuits

A
BOOT4PGPG pin ESD damage if BOOT pin voltage > 20 VA
PG5RT

RT pin ESD damage if PG pin voltage > 5.5 V

A
FB7AGND

The regulator operates at maximum duty cycle. Output voltage rises to nearly the input voltage (VIN) level. Possible damage to customer load and/or output stage components can occur. No effect on device.

B
AGND8ENLoss of ENABLE functionality. Device remains in shutdown mode.B
EN9VINNormal operation, no damage to device. Loss of ENABLE functionality.B
VIN10VINNo effectD
VIN11VINNo effectD
PGND/DAP13

Any

Other pin is shorted to ground, see Table 4-2Any
Table 4-5 Pin FMA for Device Pins Short-Circuited to Supply
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
SW1

Damage to internal power FET(s) and/or other internal circuits

A
SW2Damage to internal power FET(s) and/or other internal circuitsA
SW3

Damage to internal power FET(s) and/or other internal circuits

A
BOOT4

VOUT = 0 V. BOOT ESD clamp runs current to destruction.

A
PG5

Pin ESD Damage if supply voltage > 20 V

A
RT6

Pin ESD Damage if supply voltage > 5.5 V

A
FB7If supply voltage exceeds 5.5 V damage occurs. VOUT = 0 VA
AGND8Possible damage to internal circuits or packageA
EN9No damage to device. Loss of ENABLE functionality.B
VIN10No effectD
VIN11No effectD
VIN12No effectD
PGND/DAP13Possible damage to internal circuits or package

A