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SFFS422 May 2022

Trademarks
2
1Scope
2Related Documents
3Related Standards and Acronyms
4Concept Overview
5Concept FMEA
1. 5.1 System FMEA
6References

4.4.2 STO Safe Subsystem States and Timing Diagram

Table 4-2 shows the logic table of the safety subsystem. STO_1 and STO_2 are active low signals. Logic levels valid for state changes > 1 ms.

Table 4-2 Safety Subsystem Logic Table

Input 1: STO_1	Input 2: STO_2	Output 1: VCC	Output 2: P24V	IGBT Gate Driver Output	State
1	1	1	1	Normal operation	Normal operation
1	0	1	0	0 (off)	STO
0	1	0	1	0 (off)	STO
0	0	0	0	0 (off)	STO

The timing diagram of the STO_1 and STO_2 subsystems are shown in Figure 4-2 and Figure 4-3 respectively. The STO_1 and STO_2 safe subsystems cut the power of the primary and secondary supply of the gate drivers. Due to that, the output voltage OUTH/OUTL of each of the six gate drivers ISO5452 (or ISO5852S) become 0 V.

Figure 4-2 Timing Diagram Example ST0_1

Figure 4-3 Timing Diagram Example ST0_2

Figure 4-4 STO Timing Diagram Example for Turning Off the Six IGBTs, Which Results in Torque Off