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SFFS444 September 2024 ISO1211

4.1 8-D (narrow-body SOIC) Package

Figure 4-1 shows the ISO1211 pin diagram for the 8-D package. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the ISO1211 data sheet.

Figure 4-1 Pin Diagram (8-D) Package

Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground

Pin Name	Pin No.	Description of Potential Failure Effects	Failure Effect Class
V_CC1	1	No power to the device on the logic side. Verify that the absolute maximum ratings for all pins of the device are met; otherwise, device damage is plausible. OUT state undetermined.	A
EN	2	Disables the output buffer for OUT. OUT is in a high impedance state.	B
OUT	3	OUT stuck low. Device damage is plausible if IN and SENSE cause OUT to stay high for an extended period of time.	A
GND1	4	GND1 shorted to GND1. Normal operation.	D
SUB	5	Substrate shorted to FGND. A negative potential in the IN and SENSE pins can cause permanent damage.	A
FGND	6	FGND shorted to FGND. Normal Operation	D
IN	7	IN shorted to FGND and device damage is plausible	A
SENSE	8	SENSE shorted to FGND and device damage is plausible	A

Table 4-3 Pin FMA for Device Pins Open-Circuited

Pin Name	Pin No.	Description of Potential Failure Effects	Failure Effect Class
V_CC1	1	Device is not powered up. If EN is high, then current can flow through ESD to V_CC1, which can cause potential damage.	A
EN	2	Control on OUT output buffer is lost but field side data from IN and SENSE to OUT channels continues normally.	B
OUT	3	State of OUT undetermined. Field side data from IN and SENSE to OUT is lost.	B
GND1	4	No return ground pin.	B
SUB	5	Substrate opened as expected. Normal operation.	D
FGND	6	No return ground for field side.	B
IN	7	No device damage but there is loss of critical functionality.	B
SENSE	8	No device damage but there is loss of critical functionality.	B

Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin

Pin Name	Pin No.	Shorted To	Description of Potential Failure Effects	Failure Effect Class
V_CC1	1	EN	Externally, the V_CC1 supply and EN driver output is shorted when V_CC1 and EN is supplied and the logic high level and OUT is enabled and functions as expected. This function is dependent on the V_CC1 and EN pin level results of the device. If V_CC1 and EN is not supplied and low then OUT is not enabled and the output is off.	B
EN	2	OUT	Device damage is plausible.	A
OUT	3	GND1	OUT stuck low. Data communication from IN and SENSE to OUT is lost. Device damage is plausible if IN and SENSE cause OUT to stay high for an extended period of time.	A
GND1	4	OUT	OUT stuck low. Data communication from IN and SENSE to OUT is lost. Device damage is plausible if IN and SENSE cause OUT to stay high for an extended period of time.	A
SUB	5	FGND	Substrate shorted to FGND. Device damage is plausible.	A
FGND	6	IN	FGND shorted to IN and device damage is plausible.	A
IN	7	SENSE	IN shorted to SENSE and device damage is plausible.	A
SENSE	8	IN	IN shorted to SENSE and device damage is plausible.	A

Table 4-5 Pin FMA for Device Pins Short-Circuited to Supply

Pin Name	Pin No.	Description of Potential Failure Effects	Failure Effect Class
V_CC1	1	No effect. Normal operation.	D
EN	2	Functionality to disable the output buffer OUT is lost. OUT behaves as expected.	B
OUT	3	OUT stuck high. Data communication from IN and SENSE to OUT is lost. Device damage is plausible if IN and SENSE cause OUT to be low.	A
GND1	4	This causes high current to flow in the device and device damage is plausible.	A
SUB	5	Substrate shorted to V_CC1 and device damage is plausible.	A
FGND	6	Field side ground shorted to V_CC1. Causes high current to flow in the device and device damage is plausible.	A
IN	7	IN shorted to V_CC1 and device damage is plausible.	A
SENSE	8	SENSE shorted to V_CC1 and device damage is plausible.	A