SFFS475 June 2022 ADS131M06-Q1
4 Pin Failure Mode Analysis (Pin FMA)
This section provides a failure mode analysis (FMA) for the pins of the ADS131M06-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:
- Pin short-circuited to ground (see Table 4-2)
- Pin open-circuited (see Table 4-3)
- Pin short-circuited to an adjacent pin (see Table 4-4)
- Pin short-circuited to supply (see Table 4-5)
Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.
Table 4-1 TI Classification of Failure
Effects
| Class | Failure Effects |
|---|---|
| A | Potential device damage that affects functionality. |
| B | No device damage, but loss of functionality. |
| C | No device damage, but performance degradation. |
| D | No device damage, no impact to functionality or performance. |
Figure 4-1 shows the ADS131M06-Q1 pin diagram. For a detailed description of the device pins, see the Pin Configuration and Functions section in the ADS131M06-Q1 data sheet.
Figure 4-1 Pin DiagramFollowing are the assumptions of use and the device configuration assumed for the pin FMA in this section:
- AVDD and DVDD use the same 3.3-V supply voltage.
- Short-circuit to supply means short AVDD to DVDD.
- Short-circuit to ground means short AGND to DGND.
- Differential RC filters on every
ADC channel.
Series resistors are sized to limit the input currents into the analog inputs to <10 mA in all circumstances (for example, if the device is unpowered and an input signal is applied). - The device is the only peripheral on the SPI bus.
Table 4-2 Pin FMA for Device Pins
Short-Circuited to Ground
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| AIN2P | 1 | AIN2P is stuck low. VIN2 = VAIN2P – VAIN2N = AGND – VAIN2N. Conversion results of ADC2 are incorrect. | B |
| AIN2N | 2 | AIN2N is stuck low. VIN2 = VAIN2P – VAIN2N = VAIN2P – AGND. The conversion results of ADC2 are incorrect. | B |
| AIN3N | 3 | AIN3N is stuck low. VIN3 = VAIN3P – VAIN3N = VAIN3P – AGND. The conversion results of ADC3 are incorrect. | B |
| AIN3P | 4 | AIN3P is stuck low. VIN3 = VAIN3P – VAIN3N = AGND – VAIN3N. The conversion results of ADC3 are incorrect. | B |
| AIN4P | 5 | AIN4P is stuck low. VIN4 = VAIN4P – VAIN4N = AGND – VAIN4N. The conversion results of ADC4 are incorrect. | B |
| AIN4N | 6 | AIN4N is stuck low. VIN4 = VAIN4P – VAIN4N = VAIN4P – AGND. The conversion results of ADC4 are incorrect. | B |
| AIN5N | 7 | AIN5N is stuck low. VIN5 = VAIN5P – VAIN5N = VAIN5P – AGND. The conversion results of ADC5 are incorrect. | B |
| AIN5P | 8 | AIN5P is stuck low. VIN5 = VAIN5P – VAIN5N = AGND – VAIN5N. The conversion results of ADC5 are incorrect. | B |
| NC | 9 | No effect. Normal operation. | D |
| NC | 10 | No effect. Normal operation. | D |
| NC | 11 | No effect. Normal operation. | D |
| NC | 12 | No effect. Normal operation. | D |
| AGND | 13 | No effect. Normal operation. | D |
| REFIN | 14 | REFIN is stuck low. The conversion results of all ADCs are incorrect. | B |
| AVDD | 15 | The device is unpowered and not functional. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible. | A |
| SYNC/RESET | 16 | SYNC/RESET is stuck low. The device is held in reset. | B |
| CS | 17 | CS is stuck low. Normal operation when trying to communicate with the ADS131M06-Q1. | B |
| DRDY | 18 | DRDY is stuck low. No data-ready indication through the DRDY pin to the host is possible. An increase in supply current occurs when DRDY tries to drive high if the DRDY_HiZ bit = 0b. Device damage plausible if DRDY drives high for an extended period of time. | A |
| SCLK | 19 | SCLK is stuck low. No SPI communication with the device is possible. | B |
| DOUT | 20 | DOUT is stuck low. No SPI communication back to the host is possible. An increase in supply current occurs when DOUT tries to drive high. Device damage plausible if DOUT drives high for an extended period of time. | A |
| DIN | 21 | DIN is stuck low. No SPI communication with the device is possible. | B |
| XTAL2 | 22 | The device is configured for use with a chrystal oscillator: XTAL2 is stuck low. A clock is not provided to device. The device is not functional, but SPI communication with the device is possible. | B |
| The device is configured for use with an external clock: XTAL2 is stuck low. No effect. Normal operation. | D | ||
| XTAL1/CLKIN | 23 | XTAL1/CLKIN is stuck low. A clock is not provided to the device. The device is not functional, but SPI communication with the device is possible. | B |
| CAP | 24 | The device is unpowered and not functional. | B |
| DGND | 25 | No effect. Normal operation. | D |
| DVDD | 26 | The device is unpowered and not functional. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible. | A |
| NC | 27 | No effect. Normal operation. | D |
| AGND | 28 | No effect. Normal operation. | D |
| AIN0P | 29 | AIN0P is stuck low. VIN0 = VAIN0P – VAIN0N = AGND – VAIN0N. The conversion results of ADC0 incorrect. | B |
| AIN0N | 30 | AIN0N is stuck low. VIN0 = VAIN0P – VAIN0N = VAIN0P – AGND. The conversion results of ADC0 are incorrect. | B |
| AIN1N | 31 | AIN1N is stuck low. VIN1 = VAIN1P – VAIN1N = VAIN1P – AGND. The conversion results of ADC1 are incorrect. | B |
| AIN1P | 32 | AIN1P is stuck low. VIN1 = VAIN1P – VAIN1N = AGND – VAIN1N. The conversion results of ADC1 are incorrect. | B |
Table 4-3 Pin FMA for Device Pins
Open-Circuited
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| AIN2P | 1 | The state of the AIN2P input is undetermined. The conversion results of ADC2 are undetermined. | B |
| AIN2N | 2 | The state of the AIN2N input is undetermined. The conversion results of ADC2 are undetermined. | B |
| AIN3N | 3 | The state of the AIN3N input is undetermined. The conversion results of ADC3 are undetermined. | B |
| AIN3P | 4 | The state of the AIN3P input is undetermined. The conversion results of ADC3 are undetermined. | B |
| AIN4P | 5 | The state of the AIN4P input is undetermined. The conversion results of ADC4 are undetermined. | B |
| AIN4N | 6 | The state of the AIN4N input is undetermined. The conversion results of ADC4 are undetermined. | B |
| AIN5N | 7 | The state of the AIN5N input is undetermined. The conversion results of ADC5 are undetermined. | B |
| AIN5P | 8 | The state of the AIN5P input is undetermined. The conversion results of ADC5 are undetermined. | B |
| NC | 9 | No effect. Normal operation. | D |
| NC | 10 | No effect. Normal operation. | D |
| NC | 11 | No effect. Normal operation. | D |
| NC | 12 | No effect. Normal operation. | D |
| AGND | 13 | Device functionality is undetermined. The device can be unpowered or connected to ground internally through an alternate pin ESD diode and power up. | B |
| REFIN | 14 | The state of the REFIN input is undetermined. The conversion results of all ADCs are undetermined. | B |
| AVDD | 15 | Device functionality is undetermined. The device is unpowered and not functional if all external analog pins are held low. The device can power up through internal ESD diodes to AVDD if voltages above the device power-on reset threshold are present on any of the analog pins. | B |
| SYNC/RESET | 16 | The state of the SYNC/RESET input is undetermined. Device functionality is undetermined. The device can operate normally or be held in reset. | B |
| CS | 17 | The state of the CS input is undetermined. SPI communication is corrupted. | B |
| DRDY | 18 | The state of the DRDY output is undetermined. No data-ready indication through the DRDY pin to the host is possible. | B |
| SCLK | 19 | The state of the SCLK input is undetermined. No SPI communication with the device is possible. | B |
| DOUT | 20 | The state of the DOUT output is undetermined. No SPI communication back to the host is possible. | B |
| DIN | 21 | The state of the DIN input is undetermined. No SPI communication with the device is possible. | B |
| XTAL2 | 22 | The device is configured for use with chrystal oscillator: the state of the XTAL2 input is undetermined. A clock is not provided to the device. The device is not functional, but SPI communication with the device is possible. | B |
| The device is configured for use with an external clock: the state of the XTAL2 input is undetermined. No effect. Normal operation. | D | ||
| XTAL1/CLKIN | 23 | The state of the XTAL1/CLKIN input is undetermined. A clock is not provided to the device. The device is not functional, but SPI communication with the device is possible. | B |
| CAP | 24 | The internal digital LDO is unstable. Device functionality is undetermined. | B |
| DGND | 25 | Device functionality is undetermined. The device can be unpowered or connected to ground internally through an alternate pin ESD diode and power up. | B |
| DVDD | 26 | Device functionality is undetermined. The device is unpowered and not functional if all external digital pins are held low. The device can power up through internal ESD diodes to DVDD if voltages above the device power-on reset threshold are present on any of the digital pins. | B |
| NC | 27 | No effect. Normal operation. | D |
| AGND | 28 | Device functionality is undetermined. The device can be unpowered or connected to ground internally through an alternate pin ESD diode and power up. | B |
| AIN0P | 29 | The state of the AIN0P input is undetermined. The conversion results of ADC0 are undetermined. | B |
| AIN0N | 30 | The state of the AIN0N input is undetermined. The conversion results of ADC0 are undetermined. | B |
| AIN1N | 31 | The state of the AIN1N input is undetermined. The conversion results of ADC1 are undetermined. | B |
| AIN1P | 32 | The state of the AIN1P input is undetermined. The conversion results of ADC1 are undetermined. | B |
Table 4-4 Pin FMA for Device Pins
Short-Circuited to Adjacent Pin
| Pin Name | Pin No. | Shorted to | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|---|
| AIN2P | 1 | AIN2N | VIN2 = VAIN2P – VAIN2N = 0 V. The conversion result of ADC2 is approximately 0 V. | B |
| AIN2N | 2 | AIN3N | The conversion results of ADC2 and ADC3 are undetermined. | B |
| AIN3N | 3 | AIN3P | VIN3 = VAIN3P – VAIN3N = 0 V. The conversion result of ADC3 is approximately 0 V. | B |
| AIN3P | 4 | AIN4P | The conversion results of ADC3 and ADC4 are undetermined. | B |
| AIN4P | 5 | AIN4N | VIN4 = VAIN4P – VAIN4N = 0 V. The conversion result of ADC4 is approximately 0 V. | B |
| AIN4N | 6 | AIN5N | The conversion results of ADC4 and ADC5 are undetermined. | B |
| AIN5N | 7 | AIN5P | VIN5 = VAIN5P – VAIN5N = 0 V. The conversion result of ADC5 is approximately 0 V. | B |
| AIN5P | 8 | NC | Not considered. Corner pin. | D |
| NC | 9 | NC | No effect. Normal operation. | D |
| NC | 10 | NC | No effect. Normal operation. | D |
| NC | 11 | NC | No effect. Normal operation. | D |
| NC | 12 | AGND | No effect. Normal operation. | D |
| AGND | 13 | REFIN | REFIN is stuck low. The conversion results of all ADCs are incorrect. | B |
| REFIN | 14 | AVDD | REFIN is stuck high. The conversion results of all ADCs are incorrect. | B |
| AVDD | 15 | SYNC/RESET | No effect. Normal operation. The device cannot be reset or synchronized using the SYNC/RESET pin anymore. | B |
| SYNC/RESET | 16 | CS | Not considered. Corner pin. | D |
| CS | 17 | DRDY | SPI communication is corrupted. No SPI communication with the device is possible. An increase in supply current is possible when DRDY tries to drive low when CS is driven high and vice versa. Device damage plausible if this condition exists for an extended period of time. | A |
| DRDY | 18 | SCLK | SPI communication is corrupted. No SPI communication with the device is possible. An increase in supply current is possible when DRDY tries to drive low when SCLK is driven high and vice versa. Device damage plausible if this condition exists for an extended period of time. | A |
| SCLK | 19 | DOUT | SPI communication is corrupted. No SPI communication with the device is possible. An increase in supply current is possible when DOUT tries to drive low when SCLK is driven high and vice versa. Device damage plausible if this condition exists for an extended period of time. | A |
| DOUT | 20 | DIN | SPI communication is corrupted. No SPI communication with the device is possible. An increase in supply current is possible when DOUT tries to drive low when DIN is driven high and vice versa. Device damage plausible if this condition exists for an extended period of time. | A |
| DIN | 21 | XTAL2 | The device is configured for use with crystal oscillator: SPI communication is corrupted. No SPI communication with the device is possible. The XTAL2 signal is corrupted. Device behavior is undetermined. | B |
| The device is configured for use with an external clock: no effect. Normal operation as long as DIN can drive the pulldown resistor between XTAL2 and DGND. | D | |||
| XTAL2 | 22 | XTAL1/CLKIN | XTAL1/CLKIN and XTAL2 are shorted. A clock is not provided to the device. The device is not functional, but SPI communication with the device is possible. | B |
| XTAL1/CLKIN | 23 | CAP | Device behavior is undetermined. Device damage plausible when the XTAL1/CLKIN pin drives the digital core LDO output on the CAP pin to >1.8 V. | A |
| CAP | 24 | DGND | Not considered. Corner pin. | D |
| DGND | 25 | DVDD | The device is unpowered and not functional. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible. | A |
| DVDD | 26 | NC | No effect. Normal operation. | D |
| NC | 27 | AGND | No effect. Normal operation. | D |
| AGND | 28 | AIN0P | AIN0P is stuck low. VIN0 = VAIN0P – VAIN0N = AGND – VAIN0N. The conversion results of ADC0 are incorrect. | B |
| AIN0P | 29 | AIN0N | VIN0 = VAIN0P – VAIN0N = 0 V. The conversion result of ADC0 is approximately 0 V. | B |
| AIN0N | 30 | AIN1N | The conversion results of ADC0 and ADC1 are undetermined. | B |
| AIN1N | 31 | AIN1P | VIN1 = VAIN1P – VAIN1N = 0 V. The conversion result of ADC1 is approximately 0 V. | B |
| AIN1P | 32 | AIN2P | Not considered. Corner pin. | D |
Table 4-5 Pin FMA for Device Pins
Short-Circuited to
Supply
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| AIN2P | 1 | AIN2P is stuck high. VIN2 = VAIN2P – VAIN2N = AVDD – VAIN2N. The conversion results of ADC2 are incorrect. | B |
| AIN2N | 2 | AIN2N is stuck high. VIN2 = VAIN2P – VAIN2N = VAIN2P – AVDD. The conversion results of ADC2 are incorrect. | B |
| AIN3N | 3 | AIN3N is stuck high. VIN3 = VAIN3P – VAIN3N = VAIN3P – AVDD. The conversion results of ADC3 are incorrect. | B |
| AIN3P | 4 | AIN3P is stuck high. VIN3 = VAIN3P – VAIN3N = AVDD – VAIN3N. The conversion results of ADC3 are incorrect. | B |
| AIN4P | 5 | AIN4P is stuck high. VIN4 = VAIN4P – VAIN4N = AVDD – VAIN4N. The conversion results of ADC4 are incorrect. | B |
| AIN4N | 6 | AIN4N is stuck high. VIN4 = VAIN4P – VAIN4N = VAIN4P – AVDD. The conversion results of ADC4 are incorrect. | B |
| AIN5N | 7 | AIN5N is stuck high. VIN5 = VAIN5P – VAIN5N = VAIN5P – AVDD. The conversion results of ADC5 are incorrect. | B |
| AIN5P | 8 | AIN5P is stuck high. VIN5 = VAIN5P – VAIN5N = AVDD – VAIN5N. The conversion results of ADC5 are incorrect. | B |
| NC | 9 | No effect. Normal operation. | D |
| NC | 10 | No effect. Normal operation. | D |
| NC | 11 | No effect. Normal operation. | D |
| NC | 12 | No effect. Normal operation. | D |
| AGND | 13 | The device is unpowered and not functional. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible. | A |
| REFIN | 14 | REFIN is stuck high. The conversion results of all ADCs are incorrect. | B |
| AVDD | 15 | No effect. Normal operation. | D |
| SYNC/RESET | 16 | No effect. Normal operation. The device cannot be reset or synchronized using the SYNC/RESET pin anymore. | B |
| CS | 17 | CS is stuck high. No SPI communication with the device is possible. | B |
| DRDY | 18 | DRDY is stuck high. No data-ready indication through the DRDY pin to the host is possible. An increase in supply current occurs when DRDY tries to drive low. Device damage plausible if DRDY drives low for an extended period of time. | A |
| SCLK | 19 | SCLK is stuck high. No SPI communication with the device is possible. | B |
| DOUT | 20 | DOUT is stuck high. No SPI communication back to the host is possible. An increase in supply current occurs when DOUT tries to drive low. Device damage plausible if DOUT drives low for an extended period of time. | A |
| DIN | 21 | DIN is stuck high. No SPI communication with the device is possible. | B |
| XTAL2 | 22 | The device is configured for use with a crystal oscillator: XTAL2 is stuck high. A clock is not provided to the device. The device is not functional, but SPI communication with the device is possible. | B |
| The device is configured for use with an external clock: XTAL2 is stuck high. No effect. Normal operation. | D | ||
| XTAL1/CLKIN | 23 | XTAL1/CLKIN is stuck high. A clock is not provided to the device. The device is not functional, but SPI communication with the device is possible. | B |
| CAP | 24 | The device can operate normally, but permanent device damage within a short period of time is very plausible. The device is not functional anymore in case of damage. | A |
| DGND | 25 | The device is unpowered and not functional. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible. | A |
| DVDD | 26 | No effect. Normal operation. | D |
| NC | 27 | No effect. Normal operation. | D |
| AGND | 28 | The device is unpowered and not functional. Observe that the absolute maximum ratings for all pins of the device are met, otherwise device damage may be plausible. | A |
| AIN0P | 29 | AIN0P is stuck high. VIN0 = VAIN0P – VAIN0N = AVDD – VAIN0N. The conversion results of ADC0 are incorrect. | B |
| AIN0N | 30 | AIN0N is stuck high. VIN0 = VAIN0P – VAIN0N = VAIN0P – AVDD. The conversion results of ADC0 are incorrect. | B |
| AIN1N | 31 | AIN1N is stuck high. VIN1 = VAIN1P – VAIN1N = VAIN1P – AVDD. The conversion results of ADC1 are incorrect. | B |
| AIN1P | 32 | AIN1P is stuck high. VIN1 = VAIN1P – VAIN1N = AVDD – VAIN1N. The conversion results of ADC1 are incorrect. | B |