SFFS493 October 2024 OPT4001-Q1
The failure mode distribution estimation for the OPT4001-Q1 in Table 3-1 comes from the combination of common failure modes listed in standards such as IEC 61508 and ISO 26262, the ratio of sub-circuit function size and complexity, and from best engineering judgment.
The failure modes listed in this section reflect random failure events and do not include failures resulting from misuse or overstress.
Die Failure Modes | Failure Mode Distribution (%) |
---|---|
I2C communication error | 10 |
Some output register bits stuck or false values | 15 |
ADC offset in output measurement | 15 |
Photodiode current out of specification | 15 |
Control register bank data bit error | 15 |
INT pin false trigger or fail to trigger | 5 |
Optical filter characteristics changing over time | 15 |
Device output reading out of specification | 10 |