SFFS599 june   2023 TPS3435 , TPS3435-Q1 , TPS3436-Q1 , TPS35 , TPS35-Q1 , TPS36-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)

Pin Failure Mode Analysis (Pin FMA)

This section provides a Failure Mode Analysis (FMA) for the pins of the TPS3435, TPS3436, TPS35, and TPS36. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

  • Pin short-circuited to Ground (see Table 4-2)
  • Pin open-circuited (see Table 4-3)
  • Pin short-circuited to an adjacent pin (see Table 4-4)
  • Pin short-circuited to supply (see Table 4-5)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality
BNo device damage, but loss of functionality
CNo device damage, but performance degradation
DNo device damage, no impact to functionality or performance

Figure 4-1 and Figure 4-2 show the TPS3435, TPS3436, TPS35, and TPS36 pin diagrams. For a detailed description of the device pins please refer to TPS3435, TPS3436, TPS35, or TPS36 in the Pin Configuration and Functions section of the data sheet.

GUID-20210630-CA0I-QJPJ-GGTW-VML89JL3BFT0-low.svgFigure 4-1 Pin Configuration Option A
DDF Package,8-Pin SOT-23,
TPS35 and TPS36 Top View
GUID-20210630-CA0I-6SG0-FQHM-FVKDXKWRWJCF-low.svgFigure 4-2 Pin Configuration Option A
DDF Package,8-Pin SOT-23,
TPS3435 and TPS3436 Top View

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • Output reset Pullup Resistor (RPULLUP) = 10 kΩ, Output reset pullup voltage (VPULLUP = 5.5 V, output reset load (CLOAD) = 10 pF.
  • Tables valid over the operating free-air temperature range of – 40°C to 125°C, unless otherwise noted.
  • Typical values are at TA = 25°C, VDD = 6.0V
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
PIN NAME PIN NO. DESCRIPTION OF POTENTIAL FAILURE EFFECT(S) FAILURE EFFECT CLASS
MR 1

RESET/WDO is asserted.

B

CWD

2

Capacitance value is detected after startup, or error detection. If it's shorted to ground then the WD is disabled.

B

CRST (TPS35 and TPS36)

3

tD is the max value. Please refer to the switching characteristics table in the TPS35, or TPS36 data sheets for more information.

B

CRST (TPS3435 and TPS3436)

3

WDO stays asserted.

B

GND

4

Expected operating condition.

D

SET0 5

Unexpected behavior if application needs SET0 = 1.

B

WDI

6 Constant WD timeout faults. B
WDO / RESET(Open Drain) 7

WDO / RESET constantly asserted; some additional current can flow through pullup resistor.

B

WDO / RESET(Push Pull) 7 Functionality lost and can cause permanent damage.

A

VDD 8 Device non-operational.

B

Table 4-3 Pin FMA for Device Pins Open-Circuited
PIN NAME PIN NO. DESCRIPTION OF POTENTIAL FAILURE EFFECT(S) FAILURE EFFECT CLASS
MR 1 Device can not pass MR to RESET. B

CWD

2

Output is asserted.

B
CRST 3 Nothing happens until error condition, then reset delay is 2 mS. C
GND 4 Device is non-operational. B
SET0 5 Leads to large indeterminate voltage levels. This causes large currents that can damage the device. The output behavior is not deterministic A
WDI 6 Leads to large indeterminate voltage levels. This causes large currents that can damage the device. A
WDO / RESET(Open Drain) 7 Constant high, no WDO/RESET functionality. B
WDO / RESET(Push Pull) 7 High impedance output, no WDO/RESET functionality. B
VDD 8 Device is non-operational.

B

Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
PIN NAMEPIN NO.SHORTED TODESCRIPTION OF POTENTIAL FAILURE EFFECT(S)FAILURE EFFECT CLASS
MR1

CWD

If MR is pulled up device can charge CWD capacitor at an unpredictable rate that depends on pullup resistor value. If MR is active low, then the WD is disabled.

B

CWD

2

CRST

Device stays in error condition. Output assert time can be higher than expected. If either capacitor is outside the range, then the WD can be disabled.

B

CRST (TPS35 and TPS36)3

GND

tD is the max value. Please refer to the switching characteristics table in the TPS35, or TPS36 data sheets for more information.

B

CRST (TPS3435 and TPS3436)3

GND

WDO stays asserted.

B

GND4SET0

Unexpected behavior if application needs SET0 = 1.

B

SET05

WDI

SET0 toggles with WDI.

B

WDI6WDO / RESET(Open Drain)Incorrect error ouput. If WDI is being driven high, then high current can flow into an active low WDO/RESET. This causes damage if the current is higher than the abs max. Please refer to the Absolute Maximum Ratings table in the TPS3435, TPS3436, TPS35, or TPS36 data sheets for more information.

A

WDI

6WDO / RESET(Push Pull)Incorrect error ouput. If WDI is being driven high, then high current can flow into an active low WDO/RESET. This causes damage if the current is higher than the abs max. Please refer to the Absolute Maximum Ratings table in the TPS3435, TPS3436, TPS35, or TPS36 data sheets for more information.

A

WDO / RESET(Open Drain)7VDD

Large current can flow into WDO/RESET when in error condition. This can cause permanant damage.

A

WDO / RESET(Push Pull)7VDD

Can cause permanent damage.

A

VDD

8MR

Large current can flow into device driving MR signal.

B

Table 4-5 Pin FMA for Device Pins Short-Circuited to VDD
PIN NAMEPIN NO.DESCRIPTION OF POTENTIAL FAILURE EFFECT(S)FAILURE EFFECT CLASS
MR1

Large current can flow into device driving MR signal.

B

CWD

2WDO / RESET asserts. Possibility of high current which can cause device damage.A
CRST3

tD/tWDO is 2 ms. Possibility of high current which can cause device damage.

A

GND4Device is non-operational.

B

SET05Unexpected behavior if application needs SET0 = 0.

B

WDI6

Constant WD timeout faults.

B
WDO / RESET(Open Drain)7Large current can flow into WDO/RESET when in error condition. This can cause permanant damage.A
WDO / RESET(Push Pull)7Can cause permanent damage.

A

VDD8Normal operation.

D