SFFS631A May   2023  – May 2024 TPS389006-Q1

PRODUCTION DATA  

  1.   1
  2.   Trademarks
  3. 1Introduction
  4. 2Hardware Component Failure Modes Effects and Diagnostics Analysis (FMEDA)
    1. 2.1 Random Fault Estimation
      1. 2.1.1 Fault Rate Estimation Theory for Packaging
      2. 2.1.2 Fault Estimation Theory for Silicon Permanent Faults
      3. 2.1.3 Fault Estimation Theory for Silicon Transient Faults
      4. 2.1.4 The Classification of Failure Categories and Calculation
    2. 2.2 Using the FMEDA Spreadsheet Tool
      1. 2.2.1 Mission Profile Tailoring Tab
        1. 2.2.1.1 Confidence Level
        2. 2.2.1.2 Geographical Location
        3. 2.2.1.3 Life Cycle
        4. 2.2.1.4 Use Case Thermal Management Control (Theta-Ja) and Use Case Power
        5. 2.2.1.5 Safe vs Non-Safe (Safe Fail Fraction) for Each Component Type
        6. 2.2.1.6 Analog FIT Distribution Method
        7. 2.2.1.7 Operational Profile
      2. 2.2.2 Pin Level Tailoring Tab
      3. 2.2.3 Function and Diag Tailoring Tab
      4. 2.2.4 Diagnostic Coverage Tab
      5. 2.2.5 Customer Defined Diagnostics Tab
      6. 2.2.6 Totals - ISO26262 Tab
      7. 2.2.7 Details - ISO26262 Tab
      8. 2.2.8 Totals - IEC61508 Tab
      9. 2.2.9 Details - IEC61508 Tab
    3. 2.3 Example Calculation of Metrics
      1. 2.3.1 Assumptions of Use for Calculation of Safety Metrics
      2. 2.3.2 Summary of ISO 26262 Safety Metrics at Device Level
  5. 3Revision History

2.2.9 Details - IEC61508 Tab

This tab is informational only. There are no selections the user can make in this tab.

The 'Details - IEC61508' tab contains the results of the chip level FMEDA metrics based on the selections in the previous tabs. This tab shows the metrics as described by the IEC 61508 functional safety standard, broken down by each design block. This tab may be useful if the user is interested in the failure distribution or the intermediate metrics of a certain design block. For many users, this level of detail may not be needed.

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