SFFS756 November 2023 SN74HCS20-Q1
4.1 D and PW Packages
Pin Diagram (D and PW) Packages shows the SN74HCS20-Q1 pin diagram for the D and PW packages. For a detailed description of the device pins and their corresponding pin type, please refer to the Pin Configuration and Functions section in the SN74HCS20-Q1 data sheet.
Figure 4-1 Pin Diagram (D and PW)
PackagesTable 4-2 Pin FMA for Device Pins
Short-Circuited to Ground
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| NC | 3, 11 | Normal operation. | D |
| A, B, C, D | 1, 2, 4, 5, 9, 10, 12, 13 | Input pin is forced to the low logic state. See Device Function Table in the device data sheet for details of how the failure affects functionality. | B |
| GND | 7 | Normal operation. | D |
| Y | 6, 8 | Can cause excessive output current; output remains in the low output state independent of input states. | A |
| VCC | 14 | Device is not powered. System level damage can occur in this scenario. | B |
Table 4-3 Pin FMA for Device Pins Open-Circuited
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| NC | 3, 11 | Normal operation. | D |
| A, B, C, D | 1, 2, 4, 5, 9, 10, 12, 13 | Pin is floating, can change output state and cause excessive current from VCC to GND. See Implications of Slow or Floating CMOS Inputs. | A |
| GND | 7 | Device is not powered. | B |
| Y | 6, 8 | Normal operation. | D |
| VCC | 14 | Device is not powered. | B |
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
| Pin Name | Pin No. | Shorted to | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|---|
| NC | 3, 11 | A, B, C, D, Y, VCC, GND, Thermal Pad | Normal operation. | D |
| A, B, C, D | 1, 2, 4, 5, 9, 10, 12, 13 | A, B, C, D | Two inputs shorted together can cause a loss of functionality or damage to the device. Damage to the device can occur when the input voltage (VI) is driven such that VIL < VI < VIH. | A |
| A, B, C, D | 1, 2, 4, 5, 9, 10, 12, 13 | Y | Can cause loss of functionality or damage to the device. Damage to the device can occur due to feedback oscillation causing excessive current consumption. | A |
| A, B, C, D | 1, 2, 4, 5, 9, 10, 12, 13 | GND | Input pin is forced to the low logic state. See Device Function Table in the device data sheet for details of how the failure affects functionality. | B |
| A, B, C, D | 1, 2, 4, 5, 9, 10, 12, 13 | Thermal Pad | Input pin is forced to the low logic state. See Device Function Table in the device data sheet for details of how the failure affects functionality. | B |
| A, B, C, D | 1, 2, 4, 5, 9, 10, 12, 13 | VCC | Input pin is forced to the high logic state. See Device Function Table in the device data sheet for details of how the failure affects functionality. | B |
| Y | 6, 8 | GND | Can cause excessive output current; output remains in the low output state independent of input states. | A |
| Y | 6, 8 | Thermal Pad | Can cause excessive output current; output remains in the low output state independent of input states. | A |
| Y | 6, 8 | VCC | Can cause excessive output current; output remains in the high output state independent of input states. | A |
Table 4-5 Pin FMA for Device Pins
Short-Circuited to
VCC
| Pin Name | Pin No. | Description of Potential Failure Effect(s) | Failure Effect Class |
|---|---|---|---|
| NC | 3, 11 | Normal operation. | D |
| A, B, C, D | 1, 2, 4, 5, 9, 10, 12, 13 | Input pin is forced to the high logic state. See Device Function Table in the device data sheet for details of how the failure affects functionality. | B |
| GND | 7 | Device is not powered. System level damage can occur in this scenario. | B |
| Y | 6, 8 | Can cause excessive output current; output remains in the high output state independent of input states. | A |
| VCC | 14 | Normal operation. | D |