SFFS801 March 2024 TPS7B88-Q1
This section provides a failure mode analysis (FMA) for the pins of the TPS7B88-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:
Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.
Class | Failure Effects |
---|---|
A | Potential device damage that affects functionality. |
B | No device damage, but loss of functionality. |
C | No device damage, but performance degradation. |
D | No device damage, no impact to functionality or performance. |
Figure 4-1 shows the TPS7B88-Q1 pin diagram. For a detailed description of the device pins, see the Pin Configuration and Functions section in the TPS7B88-Q1 data sheet.
Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
---|---|---|---|
IN | 1 | No input to the device. The output is off | B |
GND | 2 | No effect. Normal operation. | D |
OUT | 3 | Regulation is not possible; the device operates at current limit. The device can cycle in and out of thermal shutdown. | B |
Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
---|---|---|---|
IN | 1 | No input. The output is at ground. | B |
GND | 2 | There is no current loop for internal biasing, so the device cannot function. | B |
OUT | 3 | The load is not powered. | B |
Pin Name | Pin No. | Shorted to | Description of Potential Failure Effects | Failure Effect Class |
---|---|---|---|---|
IN | 1 | GND | No input to the device. The output is off | B |
OUT | 3 | GND | Regulation is not possible; the device operates at current limit. The device can cycle in and out of thermal shutdown. | B |
Pin Name | Pin No. | Description of Potential Failure Effects | Failure Effect Class |
---|---|---|---|
IN | 1 | No effect. Normal Operation. | D |
GND | 2 | No input to the device. The output is off. | B |
OUT | 3 | Regulation is not possible. Vout = Vin | B |