SFFS801 March   2024 TPS7B88-Q1

 

  1.   1
  2.   Trademarks
  3. 1Overview
  4. 2Functional Safety Failure In Time (FIT) Rates
  5. 3Failure Mode Distribution (FMD)
  6. 4Pin Failure Mode Analysis (Pin FMA)

Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the TPS7B88-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

  • Pin short-circuited to ground (see Table 4-2)
  • Pin open-circuited (see Table 4-3)
  • Pin short-circuited to an adjacent pin (see Table 4-4)
  • Pin short-circuited to supply (see Table 4-5)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality.
BNo device damage, but loss of functionality.
CNo device damage, but performance degradation.
DNo device damage, no impact to functionality or performance.

Figure 4-1 shows the TPS7B88-Q1 pin diagram. For a detailed description of the device pins, see the Pin Configuration and Functions section in the TPS7B88-Q1 data sheet.

GUID-20210107-CA0I-BT5V-6MLP-0NH9BQMQHBN3-low.svg Figure 4-1 Pin Diagram
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
IN 1 No input to the device. The output is off B
GND 2 No effect. Normal operation. D
OUT 3 Regulation is not possible; the device operates at current limit. The device can cycle in and out of thermal shutdown. B
Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
IN 1 No input. The output is at ground. B
GND 2 There is no current loop for internal biasing, so the device cannot function. B
OUT 3 The load is not powered. B
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin Name Pin No. Shorted to Description of Potential Failure Effects Failure Effect Class
IN 1 GND No input to the device. The output is off B
OUT 3 GND Regulation is not possible; the device operates at current limit. The device can cycle in and out of thermal shutdown. B
Table 4-5 Pin FMA for Device Pins Short-Circuited to supply
Pin Name Pin No. Description of Potential Failure Effects Failure Effect Class
IN 1 No effect. Normal Operation. D
GND 2 No input to the device. The output is off. B
OUT 3 Regulation is not possible. Vout = Vin B