4 Pin Failure Mode Analysis (Pin FMA)

This section provides a failure mode analysis (FMA) for the pins of the ISOTMP35-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

• Pin short-circuited to ground (see Table 4-2)
• Pin open-circuited (see Table 4-3)
• Pin short-circuited to an adjacent pin (see Table 4-4)
• Pin short-circuited to supply (see Table 4-5)

Table 4-2 through Table 4-5 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Figure 4-1 shows the DFQ package pin diagram. For a detailed description of the device pins, see the Pin Configuration and Functions section in the ISOTMP35-Q1 data sheet.

Figure 4-1 Pin Diagram

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

• Bypass capacitor on the input voltage pin of 0.01µF.
• Series resistors are sized to limit the input currents to the analog inputs to < 5mA.
• Capacitive loading on output pin is limited to 1100pF.