2.4 Inverting PGA Mode

Figure 7 shows the SAC Inverting PGA mode. In this mode, signal can be amplified with inverting. As negative voltage is not allowed in SAC usage, biasing is must have for SAC inverting PGA mode. Bias voltage can be generated by external circuit or internal 12-bit DAC. The red highlighted part in Figure 7 shows the use case that using internal DAC to generate bias voltage at OA positive input. Usually bias voltage is half of the power supply voltage. The signal input is from external pin OAx- or internal paired OA.

Figure 7. Smart Analog Combo Inverting PGA Mode

To configure SAC into inverting PGA mode, The PGA MSEL selects OAx- (MSEL = 00b) or a paired OA (MSEL = 11b) as the source, and the OA negative port must select PGA input (NSEL = 01b). The OA positive port can select from the external pin OAx+ or the 12-bit DAC. SAC gain is configured by GAIN bits in SACxPGA control register. Example 4 shows one code sequence of configuring SAC into inverting PGA mode with driver library API functions.