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SLAAE47A May 2022 – August 2022 DAC11001A , DAC11001B

Abstract
Trademarks
1Introduction
2DAC Error Sources
3Error Sources from Reference
4Error Sources from Inverting and Non-Inverting Gain Stage
5Example Calculation using DAC11001A
6Error Summary
7References
8Revision History

4.2 Input Offset Voltage Drift Error

Input offset voltage drift error is defined as the expected change in input offset voltage due to change in temperature. To calculate the offset voltage drift error in ppm see Equation 11.

Equation 11.

I n p u t o f f s e t V o l t a g e D r i f t E r r o r (p p m) = \frac{\frac{{d V}_{O S}}{d T} (m a x) (µ V /^{o} C) \times M a x O p e r a t i n g t e m p e r a t u r e R a n g e (^{o} C) \times O f f s e t V o l t a g e G a i n \times 10^{6}}{| O p a m p' s O u t p u t V o l a t g e (V) |}