SLAAE55 September   2022 DAC11001B

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2Key Applications
    1. 2.1 Audio Tester
    2. 2.2 High Performance Audio
    3. 2.3 Automated Test Equipment (ATE) and Arbitrary Waveform Generation (AWG)
  5. 3DAC11001B
  6. 4Performance Test Result
  7. 5Competitor Analysis - Audio Tester Applications
  8. 6Summary
  9. 7References

DAC11001B

DAC11001B features a 20-bit resolution, highly accurate INL, DNL (1ppm max), ultra-low noise performance (7nV/√Hz) with fast settling time (1 μs), and an on-chip enhanced deglitch circuit that enables very low glitch (1nV-s), which helps to generate a 1-kHz ultra-low distortion waveform with a THD of -120dB. The DAC11001B device incorporates a power-on reset (POR) circuit so that the DAC powers on with known values in the registers. With external references, the DAC output ranges from positive reference (VREFPF) to the negative reference (VREFNF) can be achieved, including asymmetric output ranges. The DAC11001B uses a versatile 4–wire serial interface that operates at clock rates of up to 50 MHz.

System design needs careful attention to select companion parts, both active and passive components in order to achieve the 20-bit, ultra-low noise distortion performance guaranteed by the DAC11001B in the real world. Thermal effect seriously affects system performance, so components with low-temperature coefficients must be used, and all inherent component errors and generated errors from the signal chain must be low or comparable to the DAC-generated errors.

For more details on error sources and calculations, see Error Calculation for Unbuffered R2R DAC – Example Using DAC11001A.

In addition, the PCB layout also plays a vital role in reducing errors in the system. The analog and digital components must be isolated in the design, placing analog circuits away from high-frequency components such as switching power supplies and digital communications lines.

Figure 3-1 shows a typical signal chain with recommended parts to achieve the best AC performance.

Figure 3-1 DAC11001B Signal Chain Block Diagram With Companion Parts

The DAC11001B offer an unbuffered voltage output to provide flexibility to customers to choose an external buffer based on their system performance.

In this circuit, the OPA828, a JFET operational amplifier (op amp), is used as a buffer at the output of the DAC11001B. The OPA828 offers a low-offset voltage (50 µV) and low noise (4 nV/√Hz typical), which is flat across the frequency band up to 100 kHz. The AC characteristics, including a 45-MHz gain bandwidth product (GBW), a slew rate of 150 V/μs, and precision DC characteristics, make the OPA828 an excellent choice for waveform generation applications. The OPA828 is also used to build an active filter to remove higher-order harmonics content.

The OPA827 is used as a reference buffer to drive the unbuffered reference input of the DAC11001B. The excellent DC performance of this device provides very low noise (4 nV at 1 kHz), very low drift (0.5 µV/°C, typical), and low-bias current (3 pA, typical). Also, the device supports a wide supply- voltage range, ±4 V to ±18 V, which supports the wide input reference requirement of the DAC11001B (up to ±15 V).

The signal chain uses REF7025 as a reference source that offers high precision, low noise, and a very low-temperature drift coefficient (2 ppm/°C) with high accuracy (±0.025%).