SLASEB7D June 2017 – December 2020
PRODUCTION DATA
The ADC12_B module supports fast 12-bit analog-to-digital conversions with differential and single-ended inputs. The module implements a 12-bit SAR core, sample select control, a reference generator, and a conversion result buffer. A window comparator with lower and upper limits allows CPU-independent result monitoring with three window comparator interrupt flags.
Table 9-18 lists the external trigger sources.
ADC12SHSx | CONNECTED TRIGGER SOURCE | |
---|---|---|
BINARY | DECIMAL | |
000 | 0 | Software (ADC12SC) |
001 | 1 | TA0 CCR1 output |
010 | 2 | TB0 CCR0 output |
011 | 3 | TB0 CCR1 output |
100 | 4 | TA1 CCR1 output |
101 | 5 | TA2 CCR1 output |
110 | 6 | TA3 CCR1 output |
111 | 7 | TA4 CCR1 output |
Table 9-19 lists the available multiplexing between internal and external analog inputs.
CONTROL BIT IN ADC12CTL3 REGISTER | EXTERNAL ADC INPUT (CONTROL BIT = 0) |
INTERNAL ADC INPUT (CONTROL BIT = 1) |
---|---|---|
ADC12BATMAP | A31 | Battery monitor |
ADC12TCMAP | A30 | Temperature sensor |
ADC12CH0MAP | A29 | N/A(1) |
ADC12CH1MAP | A28 | N/A(1) |
ADC12CH2MAP | A27 | N/A(1) |
ADC12CH3MAP | A26 | N/A(1) |