米6体育平台手机版

SLASEB7D June 2017 – December 2020

PRODUCTION DATA

9.14.3 Port P1 (P1.2 to P1.7) Input/Output With Schmitt Trigger

Figure 9-4 shows the port diagram. Table 9-26 summarizes the selection of the pin function.

Functional representation only.

Figure 9-4 Port P1 (P1.2 to P1.7) Diagram

Table 9-26 Port P1 (P1.2 to P1.7) Pin Functions

PIN NAME (P1.x)	x	FUNCTION	CONTROL BITS AND SIGNALS⁽¹⁾
PIN NAME (P1.x)	x	FUNCTION	P1DIR.x	P1SEL1.x	P1SEL0.x
P1.2/UCA1SIMO/UCA1TXD/A8/C8	2	P1.2 (I/O)	0 = Input, 1 = Output	0	0
		UCA1SIMO/UCA1TXD	X⁽³⁾	0	1
		N/A	0	1	0
		Internally tied to DVSS	1	1	0
		A8, C8⁽⁴⁾⁽⁵⁾	X	1	1
P1.3/UCA1SOMI/UCA1RXD/A9/C9	3	P1.3 (I/O)	0 = Input, 1 = Output	0	0
		UCA1SOMI/UCA1RXD	X⁽³⁾	0	1
		N/A	0	1	0
		Internally tied to DVSS	1	1	0
		A9, C9⁽⁴⁾⁽⁵⁾	X	1	1
P1.4/TB0.4/UCB0STE/A2/C2	4	P1.4 (I/O)	0 = Input, 1 = Output	0	0
		TB0.CCI4A	0	0	1
		TB0.4	1	0	1
		UCB0STE	X⁽²⁾	1	0
		A2, C2⁽⁴⁾⁽⁵⁾	X	1	1
P1.5/TB0.5/UCB0CLK/A3/C3	5	P1.5(I/O)	0 = Input, 1 = Output	0	0
		TB0.CCI5A	0	0	1
		TB0.5	1	0	1
		UCB0CLK	X⁽²⁾	1	0
		A3, C3⁽⁴⁾⁽⁵⁾	X	1	1
P1.6/UCB0SIMO/UCB0SDA/A4/C4	6	P1.6(I/O)	0 = Input, 1 = Output	0	0
		N/A	0	0	1
		Internally tied to DVSS	1	0	1
		UCB0SIMO/UCB0SDA	X⁽²⁾	1	0
		A4, C4⁽⁴⁾⁽⁵⁾	X	1	1
P1.7/USSTRG/UCB0SOMI/UCB0SCL/ A5/C5	7	P1.7(I/O)	0 = Input, 1 = Output	0	0
		USSTRG (independent function)	0	X	1
		USSTRG (independent function)	0	1	X
		Internally tied to DVSS	1	0	1
		UCB0SOMI/UCB0SCL	X⁽²⁾	1	0
		A5, C5⁽⁴⁾⁽⁵⁾	X	1	1

(1) X = Don't care

(2) Direction controlled by eUSCI_B0 module.

(3) Direction controlled by eUSCI_A1 module.

(4) Setting P1SEL1.x and P1SEL0.x disables the output driver and the input Schmitt trigger to prevent parasitic cross currents when applying analog signals.

(5) Setting the CEPDx bit of the comparator disables the output driver and the input Schmitt trigger to prevent parasitic cross currents when applying analog signals. Selecting the Cx input pin to the comparator multiplexer with the input select bits in the comparator module automatically disables output driver and input buffer for that pin, regardless of the state of the associated CEPDx bit.