SLAT161 June   2022 HD3SS3411 , TMUXHS4412

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2What is PCI Express (PCIe)?
    1. 2.1 PCIe Link
    2. 2.2 PCIe Clocking Architectures
      1. 2.2.1 Common Reference Clock
      2. 2.2.2 Data Reference Clock
      3. 2.2.3 Separate Reference Clock
    3. 2.3 PCIe Reference Clock Specification
  5. 3Reference Clock Measurement With TI Multiplexers
    1. 3.1 Test Setup and Procedure
      1. 3.1.1 Test Setup
      2. 3.1.2 Test Procedure
    2. 3.2 Test Report
      1. 3.2.1 Test Result With Clock Source
      2. 3.2.2 Test Result With HD3SS3411
      3. 3.2.3 Test Result With TMUXHS4412
      4. 3.2.4 Test Result With TMUXHS221
  6. 4Summary

4 Summary

The above test results show:

  • Jitter performance and frequency almost same with or without Mux devices.
  • Due to the loss of Mux, clock amplitude is reduced about 5% but still meet PCIe reference clock specification.
  • Rise/fall time is slower with Mux devices.

  • Vcross didn't change much with or without Mux devices.

Overall, the clock signal passing though TI high speed multiplexers can still meet PCIe Gen1 to Gen4 reference clock specification. To ensure proper compliance with the PCIe standard, systems that use the PCIe interface require careful attention to the timing subsystem and architecture. Designers must consider which of the three PCIe specified reference clock architectures – Common Clock, Data Clock, Seperate Clock– will meet their application’s functional and performance goals.
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