The inverted source operand and the destination operand are logically ANDed. The result is placed into the destination. The source operand is not affected.
Status Bits
N:
Not affected
Z:
Not affected
C:
Not affected
V:
Not affected
Mode Bits
OSCOFF, CPUOFF, and GIE are not affected.
Example
The bits 15:14 of R5 (16-bit data) are cleared. R5.19:16 = 0
BIC #0C000h,R5 ; Clear R5.19:14 bits
Example
A table word pointed to by R5 (20-bit address) is used to clear bits in R7. R7.19:16 = 0
BIC.W @R5,R7 ; Clear bits in R7 set in @R5
Example
A table byte pointed to by R5 (20-bit address) is used to clear bits in Port1.
BIC.B @R5,&P1OUT ; Clear I/O port P1 bits set in @R5