SLAU367P October 2012 – April 2020 MSP430FR5041 , MSP430FR5043 , MSP430FR50431 , MSP430FR5847 , MSP430FR58471 , MSP430FR5848 , MSP430FR5849 , MSP430FR5857 , MSP430FR5858 , MSP430FR5859 , MSP430FR5867 , MSP430FR58671 , MSP430FR5868 , MSP430FR5869 , MSP430FR5870 , MSP430FR5872 , MSP430FR58721 , MSP430FR5887 , MSP430FR5888 , MSP430FR5889 , MSP430FR58891 , MSP430FR5922 , MSP430FR59221 , MSP430FR5947 , MSP430FR59471 , MSP430FR5948 , MSP430FR5949 , MSP430FR5957 , MSP430FR5958 , MSP430FR5959 , MSP430FR5962 , MSP430FR5964 , MSP430FR5967 , MSP430FR5968 , MSP430FR5969 , MSP430FR5969-SP , MSP430FR59691 , MSP430FR5970 , MSP430FR5972 , MSP430FR59721 , MSP430FR5986 , MSP430FR5987 , MSP430FR5988 , MSP430FR5989 , MSP430FR5989-EP , MSP430FR59891 , MSP430FR5992 , MSP430FR5994 , MSP430FR59941 , MSP430FR6005 , MSP430FR6007 , MSP430FR6035 , MSP430FR6037 , MSP430FR60371 , MSP430FR6041 , MSP430FR6043 , MSP430FR60431 , MSP430FR6045 , MSP430FR6047 , MSP430FR60471 , MSP430FR6820 , MSP430FR6822 , MSP430FR68221 , MSP430FR6870 , MSP430FR6872 , MSP430FR68721 , MSP430FR6877 , MSP430FR6879 , MSP430FR68791 , MSP430FR6887 , MSP430FR6888 , MSP430FR6889 , MSP430FR68891 , MSP430FR6920 , MSP430FR6922 , MSP430FR69221 , MSP430FR6927 , MSP430FR69271 , MSP430FR6928 , MSP430FR6970 , MSP430FR6972 , MSP430FR69721 , MSP430FR6977 , MSP430FR6979 , MSP430FR69791 , MSP430FR6987 , MSP430FR6988 , MSP430FR6989 , MSP430FR69891
Comparator_E Control Register 3
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
| CEPD15 | CEPD14 | CEPD13 | CEPD12 | CEPD11 | CEPD10 | CEPD9 | CEPD8 |
| rw-(0) | rw-(0) | rw-(0) | rw-(0) | rw-(0) | rw-(0) | rw-(0) | rw-(0) |
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| CEPD7 | CEPD6 | CEPD5 | CEPD4 | CEPD3 | CEPD2 | CEPD1 | CEPD0 |
| rw-(0) | rw-(0) | rw-(0) | rw-(0) | rw-(0) | rw-(0) | rw-(0) | rw-(0) |
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 15 | CEPD15 | RW | 0h | Port disable. These bits individually disable the input buffer for the pins of the port associated with Comparator_E. The bit CEPD15 disables the port of the comparator channel 15.
0b = The input buffer is enabled. 1b = The input buffer is disabled. |
| 14 | CEPD14 | RW | 0h | Port disable. These bits individually disable the input buffer for the pins of the port associated with Comparator_E. The bit CEPD14 disables the port of the comparator channel 14.
0b = The input buffer is enabled. 1b = The input buffer is disabled. |
| 13 | CEPD13 | RW | 0h | Port disable. These bits individually disable the input buffer for the pins of the port associated with Comparator_E. The bit CEPD13 disables the port of the comparator channel 13.
0b = The input buffer is enabled. 1b = The input buffer is disabled. |
| 12 | CEPD12 | RW | 0h | Port disable. These bits individually disable the input buffer for the pins of the port associated with Comparator_E. The bit CEPD12 disables the port of the comparator channel 12.
0b = The input buffer is enabled. 1b = The input buffer is disabled. |
| 11 | CEPD11 | RW | 0h | Port disable. These bits individually disable the input buffer for the pins of the port associated with Comparator_E. The bit CEPD11 disables the port of the comparator channel 11.
0b = The input buffer is enabled. 1b = The input buffer is disabled. |
| 10 | CEPD10 | RW | 0h | Port disable. These bits individually disable the input buffer for the pins of the port associated with Comparator_E. The bit CEPD10 disables the port of the comparator channel 10.
0b = The input buffer is enabled. 1b = The input buffer is disabled. |
| 9 | CEPD9 | RW | 0h | Port disable. These bits individually disable the input buffer for the pins of the port associated with Comparator_E. The bit CEPD9 disables the port of the comparator channel 9.
0b = The input buffer is enabled. 1b = The input buffer is disabled. |
| 8 | CEPD8 | RW | 0h |
Port disable. These bits individually disable the input buffer for the pins of the port associated with Comparator_E. The bit CEPD8 disables the port of the comparator channel 8. 0b = The input buffer is enabled. 1b = The input buffer is disabled. |
| 7 | CEPD7 | RW | 0h | Port disable. These bits individually disable the input buffer for the pins of the port associated with Comparator_E. The bit CEPD7 disables the port of the comparator channel 7.
0b = The input buffer is enabled. 1b = The input buffer is disabled. |
| 6 | CEPD6 | RW | 0h | Port disable. These bits individually disable the input buffer for the pins of the port associated with Comparator_E. The bit CEPD6 disables the port of the comparator channel 6.
0b = The input buffer is enabled. 1b = The input buffer is disabled. |
| 5 | CEPD5 | RW | 0h | Port disable. These bits individually disable the input buffer for the pins of the port associated with Comparator_E. The bit CEPD5 disables the port of the comparator channel 5.
0b = The input buffer is enabled. 1b = The input buffer is disabled. |
| 4 | CEPD4 | RW | 0h | Port disable. These bits individually disable the input buffer for the pins of the port associated with Comparator_E. The bit CEPD4 disables the port of the comparator channel 4.
0b = The input buffer is enabled. 1b = The input buffer is disabled. |
| 3 | CEPD3 | RW | 0h | Port disable. These bits individually disable the input buffer for the pins of the port associated with Comparator_E. The bit CEPD3 disables the port of the comparator channel 3.
0b = The input buffer is enabled. 1b = The input buffer is disabled. |
| 2 | CEPD2 | RW | 0h | Port disable. These bits individually disable the input buffer for the pins of the port associated with Comparator_E. The bit CEPD2 disables the port of the comparator channel 2.
0b = The input buffer is enabled. 1b = The input buffer is disabled. |
| 1 | CEPD1 | RW | 0h | Port disable. These bits individually disable the input buffer for the pins of the port associated with Comparator_E. The bit CEPD1 disables the port of the comparator channel 1.
0b = The input buffer is enabled. 1b = The input buffer is disabled. |
| 0 | CEPD0 | RW | 0h | Port disable. These bits individually disable the input buffer for the pins of the port associated with Comparator_E. The bit CEPD0 disables the port of the comparator channel 0.
0b = The input buffer is enabled. 1b = The input buffer is disabled. |